Sony KV-28DS65U, Руководство по обслуживанию

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5-1. BLOCK DIAGRAMS (7)
19
PP7/PST3
PP6/PST2
PP3/DDATA3
PP2/DDATA3
TMS/BKPT
TRST/DSCLK
TD0/DS0
TD1/DS1
PP5/PST1
PP4/PST0
PP1/DDATA3
PP0/DDATA0
136
45
40
A26/CS6/WEI
CS2
RXD2
TXD2
38
64
63
61
62
54
IRQ1/IPL0
IRQ4/IPL1
ATA
IRQ1/IPL2
A25/CSS
R/W
IC3308
CPU
WEI
CS2
RXD2
TXD2
159
158
157
156
154
153
152
151
126
124
121
127
137
PP(0) - PP(7)
7
20
8
21
9
22
10
PP6/PST2
PP5/PST1
PP2/DDATA2
PP7/PST3
PP3/DDATA3
PP4/PST0
PP1/DDATA1
PP0/DDATA0
PP7/PST3
PP6/PST2
PP3/DDATA3
PP2/DDATA2
PP5/PST1
PP4/PST0
PP1/DDATA1
PP0/DDATA0
TO N BOARD
(1/3)
17
18
15
14
6
10
13
1
12
9
5
4
2Y
3B
1C
1A
1Y
2B
2C
3A
IC3312
3 INPUTS AND GATES
13
6
5
4A
2Y
2B
IC3320
NAND GATES
2
1
3
1Y
1A
1B
R/W
TO N
BOARD
(1/2)
DMXTRQ1
AVIRQ TO N BOARD
(1/2)
5
1
13
2L0
5
4L1
IC3318
SELECTORS
4
9
7 2Y
3Y
1Y
41
WE/A17/LS7
59
2
1
3
9
1B
1A
1Y
3A
IC3313
NAND GATES
10
13
3B
4B
12 4A TO N BOARD
(2/2)
R/W
ACTAVRST TO N BOARD
(1/2)
DEMUXACK
AVDTACK
TO N BOARD
(1/2) DMXTRQO
TO N BOARD
(1/2)
IC3315
GP OUT BY LATCH
1
3
2D
1D
4
7
8
13
14
17
18
3D
4D
5D
6D
7D
8D
6
19
11
C
3Q
9
4Q
IC3316
GP INPUT BY LATCH
1
2
5
6
9
12
15
16
19
18
11
C
8D
2Q
1Q
3Q
4Q
5Q
6Q
7Q
8Q
TO N BOARD
(1/2)
ADVS
IC3317
1A1
2Y4
1A2
2Y2
1A4
2Y1
19
11
18
17
12
13
2G
2A1
1Y1
2A4
1Y4
2A2
IC3309
8 MBIT FLASH
28 R/W
12
11
RESET
/WE
29
.
31
.
33
.
35
.
38
.
40
.
42
.
44
.
30
.
32
.
34
.
36
.
39
.
41
.
43
.
45
D16
D31
25
~
18
.
8
~
1
.
48
.
17
.
16
A1
A19
IC3310
8 MBIT FLASH
28 R/W
12
11
RESET
/WE
45
.
43
.
41
.
39
.
36
.
34
.
32
.
30
.
44
.
42
.
40
.
38
.
35
.
33
.
31
.
29
D16
D31
25
~
18
.
8
~
1
.
48
.
17
.
16
A1
A19
D(16)-D(31)
D(16)-D(31)
120
.
119
.
117
~
113
~
111
.
109
~
107
.
105
~
103
.
101
~
99
.
97
~
95
.
93
~
91
.
89
~
87
.
85
~
83
.
81
~
79
DO
D31
D(0)-D(31)
TO N BOARD
(1/3)
78 DRAMW
76
CAS3
75
CAS2
74 CAS1
72
CAS0
71
RASO
CTSI
RTSI
RXDI
142
TXDI
141
139
138
DRAMW
CAS3
CAS2
CAS1
CAS0
RAS0
1
.
2
.
4
.
5
.
7
.
8
.
10
.
11
.
13
.
14
.
16
.
17
.
19
.
20
.
22
.
23
25
.
26
.
28
.
29
.
31
.
32
.
34
.
35
A(0)
A(23)
A(0)-A(23) TO N BOARD
(1/3)
IC3307
16 MBIT ED DRAM UPPER
17
35
/WE
/LCAS
49
~
46
.
44
~
41
.
10
~
7
.
5
~
2
21
~
23
.
28
~
32
.
24
.
27
A0
A9
34
18
/UCAS
/RAS
DQ16
DQ1
DRAMW
CAS1
CAS0
RAS0
IC3304
16 MBIT ED DRAM UPPER
17
35
/WE
/LCAS
49
~
46
.
44
~
41
.
10
~
7
.
5
~
2
21
~
23
.
28
~
32
.
24
.
27
A0
A9
34
18
/UCAS
/RAS
DQ16
DQ1
DRAMW
CAS1
CAS0
RAS0
IC3301
RESET
1 2
+5V
A(9)-A(15), A(17), A(19), A(21)
A(1)-A(19)
A(1)-A(19)
2
3
4
7
8
9
2
5
8
1
3
6
4
7
CN3301
MODEM
OUT
+5V
8Q
4 RESET
CN3302
RSTI
D (24)
D (25)
D (26)
D (27)
D (28)
D (29)
D (30)
D (31)
D (24)
D (25)
D (26)
D (27)
D (28)
D (29)
D (30)
D (31)
D(16)-D(24)
D(0)-D(15)
46
C53
OPEN
N ( )
(2/2)
DIGITAL
PROCESSING
45 46