Sony ICX274AQ, Руководство пользователя

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ICX274AQ
V
HL
V
CR
twl
two
twh
V
φ
H
V
φ
H
2
tr
H
φ
2
β
90%
10%
H
φ
1
β
tf
RG waveform
V
RGLH
V
RGH
V
RGL
V
RGLL
V
RGLm
tr twh
twl
tf
V
φ
RG
Point A
V
SUB
(Internally generated bias)
100%
90%
10%
0%
tr tf twh
φ
M
2
φ
M
V
φ
SUB
(3) Horizontal transfer clock waveform
Cross-point voltage for the H
φ
1
β rising side of the horizontal transfer clocks H
φ
1
β and H
φ
2
β waveforms is V
CR
.
The overlap period for twh and twl of horizontal transfer clocks H
φ
1
β and H
φ
2
β is two. ( β
= A, B
)
(4) Reset gate clock waveform
V
RGLH
is the maximum value and V
RGLL
is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, V
RGL
is the average value of V
RGLH
and V
RGLL
.
V
RGL
= (V
RGLH
+ V
RGLL
)/2
Assuming V
RGH
is the minimum value during the interval twh, then:
V
φ
RG
= V
RGH
– V
RGL
Negative overshoot level during the falling edge of RG is V
RGLm
.
(5) Substrate clock waveform