63
HCD-VP700
6-32.
IC BLOCK DIAGRAMS
IC103
CXA2581N-T4 (BD BOARD)
10
11
12
4
3
EQ IN
9
D
10
F
E
8
C
7
B
6
A
AC SUM
DC_ OFST
RFDCI
11 RFDCO
VC
24 BST
25 VFC
CEI
EQ
APC
5
GND
AC
SUM
26 RFC
AC
VCA
23 RFG
22 VCC
20
21
CE
19 TE_BAL
18 TE
17 FEI
16 FE
1
LD
2
PD
11
SW 12
13
DVCC
14
DVC
15
RFAC
VC
EQ
ON/OFF
VC
VC
VC
VC
DVC
DVC
APC-OFF(Hi-Z)
RW/ROM
(H/L)
DVC
DVC
AVC
DVCC
VC
DVC
RW/ROM
RW/ROM
RW/ROM
RW/ROM
RW/ROM
RW/ROM
DVCC
VCC
VCC
VCC
VOFST
VOFST
VOFST
B
C
A
D
gm
gm
DVCC
IC302
µ
PC1330HA (MAIN BOARD (1/3))
1
2
3
4
5
6
7
8
9
INVERTER
COMPARATER
SW R1
GND
SW P1
CONT
GND
VCC
SW P2
GND
SW R2
IC11
LA1845 (MAIN BOARD (3/3))
ALC
AGC
REG
GND
VCC
AM
DET
STEREO
SW
P-DET
φ
VCO
304KHz
DECODER
ANTI-BRIDIE
PILOT
CANCEL
FF
38k
FF
19K
∠
PILOT
DET
AM
IF
AM
OSC
AM
MIX
AM/FM
AM
RF.AMP
COMP
BUFF
S-CURVE
IF
BUFF
LEVEL
DET
FM
IF
FM
DET
FM-IN
AM
MIX-OUT
REG
AM
IF-IN
GND
TUNED
STEREO
FM-DET
VCC
IF-REQ
MUTE
AM/FM
VCO
STOP
OSC
FM.SD
AM-AGC
S-METER
AFC
AM-RF
IN
DECODER
OUT
AM
DET-OUT
AM-OSC
DECODER
IN
PLL-IN
PILOT
CANCEL
R-OUT
L-OUT
π
2
FF
19K
∠
0
TUNING
DRIVE
24
23
22
21
20
19
13
14
15
16
17
18
1
2
3
4
5
6
12
11
10
9
8
7
Содержание HCD-VP700
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