33
33
HCD-VP700
6-8.
SCHEMATIC DIAGRAM – MAIN (3/3) SECTION – • See page 63, 64 for IC Block Diagrams.
R64
R62
C32
C36
TP3
TP4
TP2
R17
C
11
C12
C13
C14
C25
C63
FE1
IFT11
LPF11
LPF12
R12
R15
R16
R19
R28
R29
R43
R61
R65
RB41
X51
R14
C3
R5
R6
R3
R4
C5
C31
C30
C29
C22
C23
C27
C35
R27
R30
R20
C19
R10
R66
R56
R55
C53
C51
C52
C62
C61
C60
C59
R41
C46
R42
C42
C43
R7
R18
RV11
R23
R22
C16
C15
C18
R
13
R58
C57
C58
C41
R25
C17
C56
R67
R60
R31
C28
R
26
R69
R68
C69
C24
R59
R63
C1
C38
C34
TM1
IC11
IC51
Q2
Q1
Q12
C40
D51
JR11
JR13
C2
JR9
JR19
CF2
C4
R8
CF1
C39
Q11
T11
C7
R1
C26
C21
C20
R21
R24
JR5
JR4
4.7k
4.7k
4.7
50V
4.7
50V
33k
0.01
F
47
16V
0.01
F
0.01
F
10
50V
0.01
F
10k
68k
22k
10k
220k
220k
33k
100
100
4.5MHz
270
47
16V
680
330
47
47
0.01
F
0.01
F
3.3
50V
0.01
4700p
B
0.1
F
0.01
F
47
16V
4.7k
3.3k
3.3k
1
50V
270
10k
10k
10k
0.001
B
27p
CH
27p
CH
0.47
50V
0.01
F
47
16V
0.01
F
10k
0.01
F
100k
9p
0.01
F
680
3.3k
22k
4.7k
2.2k
47
16V
0.01
F
1
50V
3.3k
100
47
16V
2.2
50V
0.022
B
100
0.47
50V
0.01
F
10k
2.2k
0
4.7
50V
2.2k
4.7k
1k
0.01
F
4.7 50V
2.2k
4.7k
0.01 F
3300p
3300p
LA1845
LC72131
UN4111
2SC1674
2SC2603
0.047
1SS355TE-17
0
0
0.01
0
0
0.01
F
1k
0.047
2SC2603-EF
0
0
680p
0.015
0.15
1k
1k
0
0
CE
C
L
M
C
DO
M
C
DI
TUN
ED
STER
EO
M
U
TE
R
-CH
L-CH
A
NALOG
.GN
D
A+12V
R
DS
D+5V
CE
CL
CL
CE
PLL D
O
PLL D
I
PLL DI
PLL DO
FM
AM
TUN
ED
FM
-IN
VCC
GN
D
STER
EO
IF-REQ
L-OUT
R-OUT
AM
/FM
VCO STOP
DET-OU
T
AM
-AGC
AM
-R
F IN
AM
-OSC
FM.SD
M
U
TE
AM
XIN
XOUT
CE
DI
CL
DO
FM
GND
VDD
FM
OSC
OSC
AM
IF
REQ
75
Ω
(NULL)
REG
AM M
IX-OU
T
AM
IF-IN
FM
-D
ET
P
ILOT
CAN
C
EL
D
ECO
DER
IN
P
LL-IN
DECOD
ER
OU
T
S.M
ETER
AFC
O
SC
(NULL)
(BO1)
(BO2)
(BO3) VCO
STOP
(BO4)
(IO1)
PD
IFIN
AIN
AOUT
NC
NC
(IO2)
PLL
AF/FM
IF MPX
RF IF AMP
SWITCH
LEVEL
FM TUNED
BUFFER
BUFFER
FM
MAIN BOARD
(3/1)
(Page31)
IC B/D
IC B/D
Содержание HCD-VP700
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