HBD-N590/N790W/N890W/N990W/N995W/T79
HBD-N590/N790W/N890W/N990W/N995W/T79
38
38
5-2. BLOCK DIAGRAM - MEMORY Section -
SD-RAM
IC102
RWE_
RA0 - RA14
RDQ0 - RDQ15
RCS_
AE9
AF13
L3
L2
/WE
RBA0
AC10
M2
BA0
RBA1
AC15
N8
BA1
RBA2
AG10
M3
BA2
/CS
RCAS_
RRAS_
AD10
AE11
K3
J3
/CAS
/RAS
RCKE
AH13
K9
CKE
RCLK0
AG17
J7
CK
RCLK0_
AH17
K7
/CK
RDQM1
RDQS1
AE17
AH18
D3
C7
DMU
DQSU
RDQS1_
RDQM0
AG18
AH19
B7
E7
/DQSU
DML
RODT
AE10
K1
ODT
RDQS0
AG16
F3
DQSL
RDQS0_
AH16
G3
/DQSL
T2
/RESET
A0 - A12,
NC, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC103
RDQ16 - RDQ31
RCLK1
AG6
RCLK1_
AH6
RDQM3
RDQS3
AH4
AH7
RDQS3_
RDQM2
AG7
AC8
RDQS2
AG5
RDQS2_
AH5
A0 - A12,
NC, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC202
A0 - A12,
NC, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC203
A0 - A12,
NC, NC
DQL0 - DQL7,
DQU0 - DQU7
NAND FLASH
IC501
BD DECODER
IC101 (2/3)
NFD0 - NFD7
D1A0 - D1A14
D0A0 - D0A14
D0A0 -
D0A14
D1A0 - D1A14
NFWEN
AE24
18
WE
NFREN
AE21
8
RE
NFCEN
NFRBN
AF22
AD21
9
7
CE
RY/BY
NFALE
NFCLE
AF24
AD22
17
16
ALE
CLE
EEPROM
IC1402
SDA
A3
13
I2C_SDA
SCL
B3
12
I2C_SCL
4
RESET
19
WP
IO1 - IO8
X401
27MHz
NS_XTALO
NS_XTALI
C28
C27
CPU_XRST
T2
/RESET
RRESET
AD9
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
T2
/RESET
T2
/RESET
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
RWE__B
RA0_B - RA14_B
RDQ0_B - RDQ15_B
RCS__B
N6
V3
RBA0_B
P5
RBA1_B
U6
RBA2_B
N5
RCAS__B
RRAS__B
R5
V1
RCKE_B
V2
RCLK0_B
AB2
RCLK0__B
AB1
RDQM1_B
RDQS1_B
AA5
AC1
RDQS1__B
RDQM0_B
AC2
AD1
RODT_B
P6
RDQS0_B
AA2
RDQS0__B
AA1
RDQ16_B - RDQ31_B
RCLK1_B
M2
RCLK1__B
M1
RDQM3_B
RDQS3_B
K4
N1
RDQS3__B
RDQM2_B
N2
K3
RDQS2_B
L2
RDQS2__B
L1
RRESET_B
T4
>001B
(EXCEPT Russian, Indian)
(Page 39)
Ver. 1.1
Содержание HBD-N590
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