5-65
•
DK-40 BOARD IC505 HG51BS263AFB (HEAD CONTROLLER, MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
FKEY0
I
Sheets bit (0) input from the auto feeder unit
2
FEEDER
I
Auto feeder unit desorption detect input terminal “L”: attach, “H”: removed
3
FPS
I
Auto feeder unit position detect sensor input terminal
4
BUSY
I/O
Busy signal in/out terminal Connected to TMGE (pin
@§
)
5
HPS0
I
Head position (0) detect sensor (PH1852) input terminal
6
HPS1
I
Head position (1) detect sensor (PH1851) input terminal
7
IVO2
O
Not used (open)
8
IVO1
O
Not used (open)
9
IVI2
I
Not used (fixed at “L”)
10
IVI1
I
Not used (fixed at “L”)
11
IVEN
I
Not used (fixed at “L”)
12
GND
—
Ground terminal
13
XIN
I
System clock input terminal (20 MHz)
14
XOUT
O
System clock output terminal (20 MHz)
15
VCC
—
Power supply terminal (+5V)
16
AC T
I
Not used (fixed at “H”)
17
AC W
I
Not used (fixed at “H”)
18
CALC
O
Not used (open)
19
DRVX
O
Strobe signal output to the thermal-head (HEAD901) “L”: power on
20
PDT3
O
Printing data (3) output to the thermal-head (HEAD901)
21
PDT2
O
Printing data (2) output to the thermal-head (HEAD901)
22
PDT1
O
Printing data (1) output to the thermal-head (HEAD901)
23
PDT0
O
Printing data (0) output to the thermal-head (HEAD901)
24
LATX
O
Serial data latch pulse output to the thermal-head (HEAD901)
25
HDCK
O
Serial data transfer clock signal output to the thermal-head (HEAD901)
26
TMGE
I/O
Timing pulse in/out terminal Connected to BUSY (pin
4
)
27
DRQX
O
Not used (open)
28
CKO
O
Clock signal output terminal (20 MHz)
29
VCC
—
Power supply terminal (+5V)
30
GND
—
Ground terminal
31
CK
I
Clock signal input terminal (20 MHz) Connected to CKO (pin
@•
)
32
DTRX
I
Not used (fixed at “L”)
33
TMG
I
Timing pulse input terminal Connected to TMG (pin
(¢
)
34
PSTX
I
Print start signal input terminal Connected to PSTX (pin
(∞
)
35
RESX
I
System reset signal input from the reset signal generator (IC501) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
36
RDX
I
Data read enable signal input from the system controller (IC503) “L” active
37
WEX
I
Data write enable signal input from the system controller (IC503) “L” active
38
VCC
—
Power supply terminal (+5V)
39
CS1X
I
Chip select signal input from the A/D, D/A converter (IC407) “L” active
40
CUTEX
I
Address signal input for the chip select signal generate Connected to address bus (A12)
41
REGX
I
Address signal input for the chip select signal generate Connected to address bus (A11)
42 to 51
AD10 to AD1
I
Address signal input from the system controller (IC503)
52
VCC
—
Power supply terminal (+5V)
53
GND
—
Ground terminal
54 to 61
DT15 to DT8
I/O
Two-way data bus with the A/D, D/A converter (IC407), system controller (IC503) and
D-RAM (IC509) (upper 8 bit)
Содержание DPP-MS300 Marketing
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Страница 46: ...DPP MS300 5 19 SCHEMATIC DIAGRAM FE 40 JK 40 Boards 5 41 5 42 Page 5 31 Page 5 30 ...
Страница 48: ...DPP MS300 5 45 5 46 5 21 SCHEMATIC DIAGRAM SW 40 Board See page 5 58 for IC Block Diagram Page 5 28 ...