Sony DPP-MS300 Marketing, Руководство по обслуживанию

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DK-40 BOARD IC503 HD6437045E15F (SYSTEM CONTROLLER)
Pin No. Pin Name I/O Description
1 BSH I
Status (CPU emancipation of memory bus) input from the A/D, D/A converter (IC407)
2 NC —
Not used (open)
3 VRSR O
Refresh stop request output to the A/D, D/A converter (IC407)
4 VWR O
Internal register data write end latch pulse output to the A/D, D/A converter (IC407)
5 VTRS I
Busy signal input from the A/D, D/A converter (IC407)
6 VSS —
Ground terminal
7 A0 O
Address signal output to the ROM (IC506), PC card controller (IC1501) and PC card slot
8 to 11 A1 to A4 O
Address signal output to the A/D, D/A converter (IC407), mechanism controller (IC505), ROM
(IC506), D-RAM (IC509), PC card controller (IC1501) and PC card slot
12 VCC —
Power supply terminal (+5V)
13 A5 O
Address signal output to the A/D, D/A converter (IC407), mechanism controller (IC505), ROM
(IC506), D-RAM (IC509), PC card controller (IC1501) and PC card slot
14 VSS —
Ground terminal
15 to 19
A6 to A10 O
Address signal output to the A/D, D/A converter (IC407), mechanism controller (IC505), ROM
(IC506), D-RAM (IC509), PC card controller (IC1501) and PC card slot
20, 21
A11, A12 O
Address signal output to the A/D, D/A converter (IC407), mechanism controller (IC505), ROM
(IC506) and D-RAM (IC509)
22, 23
A13, A14 O
Address signal output to the A/D, D/A converter (IC407) and ROM (IC506)
24, 25
A15, A16 O
Address signal output to the ROM (IC506)
26 VCC —
Power supply terminal (+5V)
27 A17 O
Address signal output to the ROM (IC506)
28 VSS —
Ground terminal
29 TIMER WR O
Data write enable signal output to the timer (IC1700)
30 WP I
Write protect signal input from the PC card controller (IC1501)
31 XRAS O
Row address strobe signal output to the A/D, D/A converter (IC407) and D-RAM (IC509)
“L” active
32 XCASL O
Lower byte column address strobe signal output to the D-RAM (IC509) “L” active
33 TIMER CE O
Chip enable signal output to the timer (IC1700)
34 XCASH O
Column address strobe signal output to the A/D, D/A converter (IC407)
Upper byte column address strobe signal output to the D-RAM (IC509) “L” active
35 VSS —
Ground terminal
36 RDWR O
Data write enable signal output to the D-RAM (IC509)
37, 38 A18, A19 O
Address signal output terminal Not used
39 NC —
Not used (open)
40 VCC —
Power supply terminal (+5V)
41 ST I
INPUT SELECT switch (S1719) input terminal
“L”: VIDEO MOTION, “H”: VIDEO STILL or MEMORY STICK/PC CARD
42 VSS —
Ground terminal
43 XRD O
Data read enable signal output terminal “L” active
44 XWDTOVF O
Watch dog timer overflow output terminal
45 VS1 I
Card voltage detection signal input from the PC card slot
46 VS2 I
Card voltage detection signal input from the PC card slot
47 TESTO O
Job output terminal (open)
48 XWR O
Data write enable signal output terminal “L” active
49 XCS1 O
Chip select signal output for the centronics parallel interface data bus
50 XCS0 O
Chip select signal output to the A/D, D/A converter (IC407)
51 REG O
Attribute memory select signal output of the PC card slot
Register access signal output to the PC card controller (IC1501)