49
Pin. No.
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Pin Name
TA1P
TBON
TB0P
TA0N
TAOP
NC
NC
DVDD
NC
NC
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
AVSS
AVDD
DVSS
TEST1
TEST0
DIRECT
LINK_ON
PC0
DVDD
Function
Arbitration / strobe output; arbitration / speed signal / data input. Reverse-phase I/O pins.(Not used)
Arbitration / speed signal / data output; arbitration / strobe input. Reverse-phase I/O pins.
Arbitration / speed signal / data output; arbitration / strobe input. Reverse-phase I/O pins.
Arbitration / speed signal / data output; arbitration / strobe input. Standard-phase I/O pins.
Arbitration / strobe output; arbitration / speed signal / data input. Reverse-phase I/O pins.
Connected to ground.
Connected to ground.
Power supply.
Connected to ground.
Connected to ground.
Ground.
Ground.
Ground.
Ground.
Ground.
Ground.
Analog ground.
Analog power supply.
Ground.
Test mode control pins. Connect to DvDD.
Test mode control pins. Connect to DvDD.
PHY-Link interface operating mode setting pin. Connect to DvDD.
Configuration Manager Capable setting pin / Link-On signal output.
Connected to ground.
Power supply.
I/O
I/O
I/O
I/O
I/O
I/O
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I
I
I
I/O
I
—
Содержание CDP-LSA1
Страница 22: ...22 Adjustment Location BD BOARD SIDE B TP FE TP TE TP VC TP XPCK TP RFAC IC103 30 16 15 1 ...
Страница 30: ...CDP LSA1 30 30 6 7 SCHEMATIC DIAGRAM MAIN 1 3 SECTION See page 28 for Printed Wiring Board ...
Страница 35: ...CDP LSA1 35 35 6 11 SCHEMATIC DIAGRAM PANEL SECTION See page 33 for Waveforms ...
Страница 37: ...CDP LSA1 37 37 6 13 SCHEMATIC DIAGRAM POWER SECTION ...