Sony CA-755, Руководство по обслуживанию

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4-18
CA-755/755P
IC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CT
RT
+IN 1
–IN 1
FEED BACK 1
DEAD TIME CONT 1
OUT 1
V REF
OUT
SCP
+IN 2
–IN 2
FEED BACK 2
DEAD TIME CONT 2
OUT 2
GND
Vcc
(+3.6 to 40V)
DUAL PWM POWER CONTROLLER
-TOP VIEW-
RT
2 1 6
CT DT 1
3
4
5
14
13
12
+ IN 1
– IN 1
FB 1
+ IN 2
– IN 2
FB 2
DT 2
+
–
+
–
–
–
+
+
–
–
11 15
SCP
10
OUT 2
7
OUT 1
16
V REF
2.5V
REG
SHORT CIRCUIT
PROTECTOR
TR I
OSC
TC7S02FU-TE85L (TOSHIBA)CHIP PACKAGE
TC7S02FU(TE85R)
TL064CPW (TI)FLAT PACKAGE
TL064CPW-E05
TC7S08FU(TE85R) (TOSHIBA)FLAT PACKAGE
1
2
3
4
8
7
6
5 GND
V
DD
(+2 to +6 V)
1
A
7
Y
3 5
A
0
1
Y
1
0
0; LOW LEVEL
1; HIGH LEVEL
C-MOS HEX INVERTERS
-TOP VIEW-
A Y
6 2
Y = A
TC7WU04FU(TE12R) (TOSHIBA)CHIP PACKAGE
TL1451ACPW-E05 (TI)
TLC272CPW-E05 (TI)FLAT PACKAGE
TLC27M2CPS (TI)FLAT PACKAGE
UPA101G (NEC)FLAT PACKAGE
UPA101G-E1
C-MOS 2-INPUT NOR GATE
(SCALE 6/1)
—TOP VIEW—
1
A
A
0
0
1
1
B
0
1
0
1
TYPE
4S01F
7S02F
7S02FU
7SH02FU
V
DD
+3 to +18V
+2 to +6V
Y
1
0
0
0
B
A
B
1
2
2
GND 3
5 V
DD
4
Y =
0 ; LOW LEVEL
1 ; HIGH LEVEL
Y = A + B = A • B
Y
4
C-MOS 2-INPUT AND GATE
(SCALE 6/1)
—TOP VIEW—
1
2
GND 3
5 V
DD
4
A
B
A
B
Y =
2
1
4
Y
A
0
0
1
1
B
0
1
0
1
TYPE
7S08F
7S08FU
4S81F
14S81F
7SH08FU
V
DD
+2 to +6V
Y
0
0
0
1
0 ; LOW LEVEL
1 ; HIGH LEVEL
Y = A • B = A + B
+3 to +18V
–2 to +5.5V
OPERATIONAL AMPLIFIER
(J FET INPUT)
—TOP VIEW—
V
EE
(-18V)
V
CC
(+18V)
1
2
3
4
5
6
7 8
9
10
11
12
13
14
+ +
+
+
–
–
–
–
TRANSISTOR ARRAY
—TOP VIEW—
1 2 3 4
8 7 6 5
OPERATIONAL AMPLIFIER
—TOP VIEW—
GND
V
DD
(+3V to +16V)
1
2
3
4 11
12
13
14
+
+
–
–