Sony CA-755, Руководство по обслуживанию

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4-14
CA-755/755P
IC
–TOP VIEW–
C-MOS 2-CHANNEL D/A CONVERTER FOR DIGITAL AUDIO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
XTO
OUT
CKSL
OUT
CKO
OUT
MUTEO
OUT
MUTEI
IN
MCON
IN
LRCI
IN
BCKI
IN
DI
IN
MDT/FSEL1
IN
MCK/FSEL2
IN
MLEN/DEEM
IN
RSTN
IN
XGND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AGND
AGND
DGND
XTI
IN
RO
OUT
RON
OUT
LON
OUT
LO
OUT
XV
DD
(+5V)
AV
DD
(+5V)
AV
DD
(+5V)
AV
DD
(+5V)
AV
DD
(+5V)
DV
DD
(+5V)
10
9
11
12
13
7
6
14
3
8
28
DI
BCKI
MDT/FSEL1
MCK/FSEL2
MLEN/DEEM
MCON
MUTEI
RSTN
CKSL
LRCI
XTI
18
20
25
23
5
1
4
LO
LON
RO
RON
MUTEO
XTO
CKO
AV
DD
, AGND
DV
DD
, DGND
XV
DD
, XGND
; ANALOG
; DIGITAL
; FOR CRYSTAL OSCILLATOR
An
A
IN
A
IN
X
A
IN
A
IN
X
CE
0
0
1
0
0
1
V
DD
+5V
+5V
+5V
+6V
+6V
+6V
Dn
D
OUT
HI-Z
HI-Z
D
IN
D
OUT
HI-Z
FUNCTION
READ
OUTPUT DISABLE
STANDBY
PGM
PGM VERIFY
PGM INH
0 : LOW LEVEL
1 : HIGH LEVEL
X
: DON'T CARE
HI-Z: HIGH IMPEDANCE
A0 - A15
CE
DQ0 - DQ7
OE
V
PP
; ADDRESS INPUT
; CHIP ENABLE INPUT
; DATA OUTPUT
; OUTPUT ENABLE INPUT
; PROGRAM VOLTAGE INPUT
OE/V
PP
0
1
X
+12.5V
0
+12.5V
5
6
7
8
9
10
11
12
13
4 3 2 1 32 31 30
NC
A6
IN
A5
IN
A4
IN
A3
IN
A2
IN
A1
IN
A0
IN
DQ0
I/O
29
28
27
26
25
24
23
22
21
NC
NC
A8
IN
A9
IN
A11
IN
OE/Vp-p
IN
A10
IN
CE
IN
DQ7
I/O
DQ6
I/O
A7
IN
A12
IN
A15
IN
A14
IN
A13
IN
V
DD
(+
5V
)
14 15 16 17 18 19 20
NC GND
DQ1
I/
O
DQ2
I/
O
DQ3
I/
O
DQ4
I/
O
DQ5
I/
O
11
10
9
8
7
6
5
4
29
28
24
27
3
30
31
2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
13
14
15
18
19
20
21
22
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE OE/Vpp
23 25
-TOP VIEW-
C-MOS 512K (65,536
×
8)-BIT UV EPROM
NM27C512V150 (NS)
OUTPUT BUFFERS
Y-GATING
Y
DECODER
OUTPUT ENABLE
CHIP ENABLE
&
PROGRAM LOGIC
512k-BIT
CELL MATRIX
X
DECODER
11
10
9
8
7
6
22
20
5
4
29
28
24
27
3
30
31
2
A 0
A 1
A 2
A 3
A 4
A 5
CE
OE/Vp-p
A 6
A 7
A 8
A 9
A10
A11
A12
A13
A14
A15
13 14 15 18 19 20 21 22
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
SM5872AS-ET (NPC)FLAT PACKAGE
INPUT
INTERFACE
AND
INFINITY•ZERO
DETECTOR
MICROCOMPUTER
INTERFACE
AND
DEEMPHASIS
SELECT
ATTENUATION
COUNTER
FILTER
OPERATION
AND
ATTENUATION
OPERATION
10 L
R
NOISE SHAPE
OPERATION
BLOCK
L
R
PWM
DATA
GENERATOR
BLOCK
L
R
DI
9
BCKI
5
MUTEO
18
LO
20
LON
25
RO
23
RON
11
12
13
7
MDT/FSEL1
MCK/FSEL2
MLEN/DEEM
MCON
6
MUTEI
TIMING
CONTROL
14
3
RSTN
CKSL
8
LRCI
28
XTI
1
4
XTO
CKO
INPUT
BCKI
CKSL
DI
LRCI
MCK/FSEL2
MCON
MDT/FSEL1
MLEN/DEEM
MUTEI
RSTN
XTI
OUTPUT
CKO
LO
LON
MUTEO
RO
RON
XTO
; BIT CLOCK
; SYSTEM CLOCK SELECT (L : 256fs/H : 512fs)
; DATA
; SAMPLE RATE (fs) CLOCK (L : R-CH/H : L-CH)
; MCON = H : MICROCOMPUTER INTERFACE CLOCK
MCON = L : FILTER SELECT * 2
; INTERFACE SELECT CONTROL * 1
; MCON = H : MICROCOMPUTER INTERFACE DATA
MCON = L : FILTER SELECT
*
2
; MCON = H : MICROCOMPUTER INTERFACE LATCH ENABLE
MCON = L : DEEMPHASIS CONTROL
; DF OUTPUT SOFT MUTE (L : OFF/H : ON)
; SYSTEM RESET
; OSCILLATOR
; CLOCK
; L-CH PWM (PULSE WIDTH MODULATION) ( )
; L-CH PWM (PULSE WIDTH MODULATION) ( )
; INFINITY ZERO DETECT
; R-CH PWM (PULSE WIDTH MODULATION) ( )
; R-CH PWM (PULSE WIDTH MODULATION) ( )
; OSCILLATOR
MCON
0
1
* 1
0
1
; LOW LEVEL
; HIGH LEVEL
MODE
FSEL1, FSEL2, DEEM
MDT, MCK, MLEN
MCON
0
0
* 2
0
1
; LOW LEVEL
; HIGH LEVEL
FSEL2
0 (44.1kHz) 1 (48.0kHz)
0 (44.1kHz) 1 (32.0kHz)
FSEL1
0
1