4
Debugging Features
Page 32
4.4.4 “WAIT” Assembly Instruction
If the SYSWAI bit in the CLKSEL register has been set, the
“WAIT”
instruction will cause a BDM communication loss. This is because the
system clock is suspended in WAIT mode, therefore stopping the BDM
peripheral.
4.4.5 Microcontroller Peripheral Running when Execution is Stopped
When program execution is stopped, some peripherals will still run while
others will stop. Which ones stop and which ones don’t depend on the
particular peripheral architecture. For more information, please refer to the
microcontroller datasheets.
In particular, to cause the COP and RTI peripherals to stop when you stop
program execution, the RSBCK in the COPCTL register must have been
previously set.
4.4.6 Real-Time Memory Update
During program execution, it is possible to view/edit the contents of the
Memory
window and
Data
window in real time (edit operations are only
available for RAM locations and peripheral registers). For example, it is
possible to set the periodical refresh of the
Memory
window contents by
choosing
“Mode > Periodical”
from the pop-up menu which appears by
right-clicking on the
Memory
window.
4.4.7 PLL Usage
The host PC communicates with the microcontroller through the USB to
BDM circuitry. The BDM communication speed depends on a clock source,
which in turn is selected by the CLKSW bit in the Status register. If the
CLKSW bit is set to 1, the BDM communication clock source is the
microcontroller’s bus frequency; if the CLKSW bit is set to 0, the BDM
communication clock source is a constant clock source (in the case of the
MC9S12DP256B, for example, it’s half the frequency of the external
oscillator).
The CLKSW bit can be set (within a debugging session) via the
Communication Settings
dialog box. To open the
Communication Settings