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PS331 HDMI/DVI SWITCH
For Customer Internal Use Only
7
TEL: 408-329-5540
FAX: 408-329-5541
Email: [email protected]
Parade Technologies Inc.
Table1. Pin Descriptions
Name
I/O
Description
Axy
I
x = 1, 2, 3 for TMDS input channel number
y = 1, 2, 3, 4 for TMDS positive differential data or clock inputs
Bxy
I
x = 1, 2, 3 for TMDS input channel number
y = 1, 2, 3, 4 for TMDS negative differential data or clock inputs
Yx
O
x = 1, 2, 3, 4 for TMDS positive differential outputs
Zx
O
x = 1, 2, 3, 4 for TMDS negative differential outputs
HPDx
O
x = 1, 2, 3 for Hot Plug Detection output to source devices
HPD_SINK
I
Hot Plug Detection input from sink device; internal pull-down at ~80K ohm
Each port’s HPD can be set independently by I2C registers. See the Register Definition Table for
details
SCLx, SDAx
I/O
SCLx: I2C bus clock lines, SDAx: I2C bus data lines; x = 1, 2, 3; 5 V tolerant; internal pull-down
at ~1.1M ohm
SCL_SINK
I/O
Sink side I2C clock line
SDA_SINK
I/O
Sink side I2C data line
SDA_CTL
SCL_CTL
I2C_ADDR
I
I2C_ADDR: I2C control bus address LSB
SDA_CTL: I2C control data; SCL_CTL: I2C control clock
SCL_CTL / SDA_CTL control is described in the Register Definition Table
REXT
I
Bias Current setting by External resistor, 500 ohm 1% to GND
POW_SINK
O
A 3.3 V CMOS output which indicates the selected port being connected to the corresponding
Source port
POW_SINK is the status for the selected Port Source Connection Detection. When the selected
port 5 V Source Supply is detected, POW_SINK will output HIGH to indicate the Source is
connected
For each port, the Port Source Connection status can also be accessed by I2C registers
I2C_RST
POWDN
I/O
I2C_RST assertion will reset the I2C control logic; POWDN assertion will power down the chip.
PS331 power-on reset and subsequent operation are controlled automatically by on-chip
configuration logic. There is usually no need to reset the I2C control logic unless for the system
debugging and development purpose. The power down control provides a tool for system to
manage the PS331 power for power sensitive applications
POW1
POW2
POW3
I
Source Connection Detection Inputs
These pins shall be connected to HDMI connector Source DC 5 V supply pins through a 37K
ohm resistor respectively. If the Source Connection Detection is not used, these pins shall be
connected to local VCC (3.3 V)
The Source Connection Detection status for each port is accessible through I2C registers
CEXT
I/O
An external capacitor is connected for supply regulation.
The capacitor should be 2.2 uF or larger for power noise filtering
GND
Ground
connection
VCC
Power supply at 3.3 V
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