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SiT6503EB Evaluation Board (EVB) HW User Manual
Contents
1 Introduction ............................................................................................................................................. 1
2 SiT6503EB Features ................................................................................................................................. 2
3 SiT6503EB Support Collateral .................................................................................................................. 2
4 Connectors Descriptions.......................................................................................................................... 2
5 Test Points Descriptions .......................................................................................................................... 3
6 Jumpers Default List ................................................................................................................................ 4
7 Default Resistor Connection from FTDI to SiT95148 ............................................................................... 5
8 Status LEDs .............................................................................................................................................. 6
9 SiT6503EB Power Supplying .................................................................................................................... 7
10 I
2
C/SPI Mode Connection ........................................................................................................................ 9
11 Clock Inputs ........................................................................................................................................... 10
12 Clock Outputs ........................................................................................................................................ 10
12.1 Output Differential Termination ................................................................................................... 11
12.1.1 LVDS, CML .......................................................................................................................... 11
12.1.2 LVPECL ............................................................................................................................... 12
12.1.3 HCSL ................................................................................................................................... 12
13 Quick Start ............................................................................................................................................. 12
Appendix A: EVB Schematic Diagrams ........................................................................................................ 14
Appendix B: EVB Top View .......................................................................................................................... 34
1
Introduction
The SiT6503EB Evaluation Board (EVB) is designed for evaluating the following Programmable clock
generator and jitter attenuating clock synthesizers:
- SiT95141
- SiT95145
- SiT95148