Silicon Graphics ICE X, Руководство пользователя

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3: System Overview
QuickPath Interconnect Features
Each processor socket on an ICE X system node board is interconnected using two QuickPath
Interconnect (QPI) links. Each QPI link consists of two point-to-point 20-bit channels - one send
channel and one receive channel. Each QPI channel is capable of sending and receiving at the
same time – on the same 20 bit channel. The QPI link has a theoretical maximum aggregate
bandwidth of 25.6 GB/s using a 3.2 GHz clock rate and 38.4 GB/s using a 4.8 GHz clock rate.
Each blade’s I/O chip set supports two processors.
IP113, IP115 and IP119 QPI Bandwidth
The maximum bandwidth of a single QPI link used in the IP113, IP115 or IP119 node board is
calculated as follows:
• The QPI channel uses a 3.2 GHz clock, but the effective clock rate is 6.4 GHz because two
bits are transmitted at each clock period - once on the rising edge of the clock and once on
the falling edge (DDR).
• Of the 20 bits in the channel, 16 bits are data and 4 bits are error correction.
• 6.4 GHz times 16 bits equals 102.4 Gbits per second.
• Convert to bytes: 102.4 divided by 8 equals 12.8 GB/s (max single direction bandwidth)
• The total aggregate bandwidth of the QPI channel is 25.6 GB/s: (12.8 GB/s x 2 channels)
IP131 and IP133 QPI Bandwidth
The maximum bandwidth of a single QPI link used in the IP131 or IP133 node board is calculated
as follows:
• The QPI channel uses a 4.8 GHz clock, but the effective clock rate is 9.6 GHz because two
bits are transmitted at each clock period - once on the rising edge of the clock and once on
the falling edge (DDR).
• Of the 20 bits in the channel, 16 bits are data and 4 bits are error correction.
• 9.6 GHz times 16 bits equals 153.6 Gbits per second.
• Convert to bytes: 153.6 divided by 8 equals 19.2 GB/s (max single direction bandwidth)
• The total aggregate bandwidth of the QPI channel is 38.4 GB/s: (19.2 GB/s x 2 channels)