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DRAM Idle Timer
This item specifies the number of clocks that the DRAM controller will remain in IDLE
state before precharging all pages.
SDRAM CAS Latency Time
This item defines the CAS Latency timing parameter of the SDRAM expressed in 66MHz
clocks. The options are 2 and 3 CLKs.
SDRAM Precharge Control
This item Enable/Disable the SDRAM precharge when a page miss occurs.
DRAM Data Integrity Mode
This item allows the user to set DRAM data integrity mode to
Non-ECC
or
ECC
. Non-
ECC has byte-wide write capability but no provision for protecting data integrity in the
DRAM array. ECC allows a detection of single-bit and multiple-bit errors and recovery of
single-bit errors.
System BIOS Cacheable
This item allows the user to set whether the system BIOS F000~FFFF areas are cacheable
or non-cacheable.
Video BIOS Cacheable
This item allows the user to set whether the video BIOS C000~C7FF areas are cacheable
or non-cacheable.
Video RAM Cacheable
This is a new cache technology for the video memory of the processor. It can greatly
improve the display speed by caching the display data. You must leave this on the default
setting of
Disabled
if your display card cannot support this feature or else your system
may not boot.
8 Bit I/O Recovery Time
The recovery time is the length of time, measured in CPU clocks, which the system will
delay after the completion of an input/output request. This delay takes place because the
CPU is operating so much after than the input/output bus that the CPU must be delayed to
allow for the completion of the I/O.
This item allows you to determine the recovery time allowed for 8 bit I/O. Choices are
from NA, 1 to 8 CPU clocks.
16-Bit I/O Recovery Time
This item allows you to determine the recovery time allowed for 16 bit I/O. Choices are
from NA, 1 to 4 CPU clocks.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be reserved for ISA cards.
This memory must be mapped into the memory space below 16 MB.
Содержание HOT-675
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