Shuttle av61, Руководство пользователя

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Chipset Features Setup
Bank x/x DRAM Timing
This value in this field is set by the system board manufacturer, de-
pending on whether the board has paged DRAMS or EDO DRAMS.
SDRAM Cycle Length
This field allows you to set the SDRAM latency timer.
DRAM Clock
This item set the DRAM Read/Write timings that the system uses.
Memory Hole
In order to improve performance, some space in memory can be
reserved for ISA cards.
Read Around Write
This is a new cache technology for the video memory of the processor.
It can greatly improve the display speed by caching the display data.
You must leave this on the default setting of Disabled if your display
card cannot support this feature or else your system may not boot.
Concurrent PCI/Host
This item disable CPU bus will be occupied during the entire PCI
operation period.
System BIOS Cacheable
This item allows the user to set whether the system BIOS F000~FFFF
areas are cacheable or non-cacheable.