8
7
6
5
4
3
2
1
A
B
C
D
1
2
3
4
5
6
7
8
D
C
B
A
VR
AM
-
>
VR
EG
+
2
4V,
+
1
2
V,-1
2
V
/T
R
Q
1
,/T
R
Q
2
,/E
X
IN
T
0
,/E
X
IN
T
1
,/IR
Q
1
VCC
19
96
/1
0/
31 S
Y
M
B
O
L
C
H
A
N
G
E
D
1
9
9
6/10
/3
1
SY
M
BOL&
N
A
ME
C
H
ANGED
1
9
9
6
/1
0
/3
1
PO
RT ST
YL
E CHA
NG
ED
C2
5
47u
F
/25V
01
1
02
2
03
3
04
4
05
5
06
6
07
7
08
8
09
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
C
O
N
12A
IO
C
N
1
(8
0
P
)
/R
D
O
/W
R
O
A
[0.
.2
3]
A2
3
A2
2
A2
1
A2
0
A1
9
A1
8
+2
4
V
3
4
IC
9
B
74
F04
VC
C
C1
7
10uF
/1
6V
D1
0
4
SFP
B
5
4
VCKD
C
VI
N
2
VO
UT
3
G
N
D
1
IC27
RX5
R
E
C243
0.
1
u
F
C2
44
1uF/
50V
VR
EG
R2
61
47
1
/2W
2
1
CON1
1
BAT
C
N
(2
P)
/P
R
A
S
3
O
GN
D
GN
D
VR
A
M
A1
5
/W
R
A1
3
A8
RA2
0
V
CKD
C
GN
D
GN
D
VRAM
A1
6
A1
4
A1
2
A7
RA
21
VCK
D
C
VC
C
VCC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
CO
N
1
4
R
A
M CON(5
0
P
)
A2
0
A2
1
VCC
1
2
3
4
5
IC28
7S
86
F
A1
7
A1
6
A1
5
A1
4
A1
3
A1
2
A1
1
A1
0
A9
A8
A7
A6
A5
A4
/O
P
T
C
S
SYNC
M
CRR
DY1
MC
R
RDY
2
/M
C
R
1
/M
CR2
CLK_USAR
T
A1
A0
/R
ES
ET
A2
A3
A6
A5
A4
A3
A2
A1
A0
A1
8
D0
D1
D2
/R
ES
ET
GN
D
GN
D
/PRAS3E
A9
A1
1
A1
0
A1
7
A1
9
D7
D6
D5
D4
D3
GND
GN
D
/PSR
E
F
1
/EXW
AI
T
/B
R
E
Q
/B
AC
K
/T
R
Q
2
/T
R
Q
1
/EXINT1
/R
D
VCC
R2
9
0
1K
+2
4
V
01
41
02
42
03
43
04
44
05
45
06
46
07
47
08
48
09
49
10
50
11
51
12
52
13
53
14
54
15
55
16
56
17
57
18
58
19
59
20
60
21
61
22
62
23
63
24
64
25
65
26
66
27
67
28
68
29
69
30
70
31
71
32
72
33
73
34
74
35
75
36
76
37
77
38
78
39
79
40
80
CO
N
1
2
B
IO
C
N
1
(8
0
P
)
/EXINT0
/RFSH
/IP
L
O
N
0
D0
D1
D2
D3
D4
D5
D6
D7
/POFF
D[
0
..
7
]
/IR
Q
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CO
N
3
CK
DC C
N
(1
8
P
)
STH
HT
S
/K
R
Q
/S
H
E
N
SC
K
VC
C
9
10
8
1
4
7
IC
2
C
74
H
C
0
0
V
CKD
C
RE
SE
T
4
5
6
1
4
7
IC
2
B
74
H
C
0
0
V
CKD
C
/R
E
S
E
T
C1
2
0
10
00P
F
C118
10
00P
F
VC
C
C106
10
00P
F
S2
SW
(
S
L
IDE SW
)
R108
10K
/S
T
O
P
/P
O
F
F
V
CKD
C
/R
E
SETS
CKDCR
+2
4
V
/R
E
S
/A
S
/W
R
A3
A2
VCK
D
C
+1
2
V
-12
V
R162
22
0
C1
57
0.
1
u
F
HA
RDW
A
R
E
RES
E
T
M
A
IN
CO
NN
EC
TOR
7/7
3-
1B
3-1B
1-8C
3-3C
3-
3B
3-3B
3-
3B
3-3B
5-3A
3-
3B
1-
6
A
1-
6B
3-
1B
3-
1B
3-1C
3-1C
1-6D
3-
3A
1-
1C
1-6
A
,1-
6C,2
-8C,
3-
8
C
,4
-3
C
,5-
7D
3-
8C
3-8C
3-
8D
1-
1B
3-8C
1-
1B
4-
4A
4-4A
4-3D
1-
6
D
,2
-8
C
,3-
8B
,4
-2
A
,4-
5C
3-8D
1-
1D
1-1D
Содержание ER-A750
Страница 3: ......
Страница 8: ...CHAPTER2 OPTIONS 1 System configuration 2 1 ...
Страница 32: ...7 2 2 Description of main LSI s 2 1 CPU HD6415108FX ...
Страница 66: ...CHAPTER 8 PWB LAYOUT 1 Main PWB Side A 8 1 ...
Страница 67: ...2 Main PWB Side B 8 2 ...
Страница 68: ...3 Mother PWB Side A 4 CKDC PWB 8 3 ...
Страница 69: ...5 Rear display PWB 6 Invator PWB 7 Noise filter PWB 8 4 ...