10
20F650
Ë
SELF ADJUSTMENT
H-VCO
1. When there is H-VCO self-adjustment key input for adjustment item H-VCO, self-adjustment is performed.
2. H-FREE(1chip) is set to 1.
3. H-OUT is set by intelligent monitor output.
4. IM input is set as TIM input.
5. H-VCO(1chip) data is changed so that the number of input pulse is 125 inside 8ms interval.
6. When adjustment completed, OSD display and H-VCO self-adjustment status data of EEPROM are updated.
7. H-FREE(1chip), intelligent monitor output and IM input mode are recovered.
RF-AGC
1. When there is RF-AGC self-adjustment key input for adjustment item RF-AGC, self-adjustment is performed.
2. AGC-OUT is set by intelligent monitor output.
3. IM input is set as AD input.
4. By decreasing RF-AGC (1chip) data from current RF-AGC adjustment value to 0, AFT input voltage becomes the
maximum setting value.
5. Increase RF-AGC(1chip) data, when AFT input voltage is at (max. 0.3V) point, adjustment is completed.
6. When adjustment completed, OSD display and RF-AGC self-adjustment status data of EEPROM are updated.
7. Intelligent monitor output and IM input mode are recovered.
PIF-VCO
1. When there is PIF-VCO self-adjustment key input for adjustment item PIF-VCO, self-adjustment is performed.
2. VIF-DEF(1chip) is set to 1.
3. AFC is set by intelligent monitor output.
4. IM input is set as AD input.
5. VIF-VCO(1chip) data is changed so that input voltage becomes 2.5V.
6. When adjustment completed, OSD display and PIF-VCO self-adjustment status data of EEPROM are updated.
7. VIF-DEF(1chip), intelligent monitor output and IM input mode are recovered.
Содержание 21FL94
Страница 6: ...6 20F650 LOCATION OF USER S CONTROL ...
Страница 28: ...28 6 5 4 3 2 1 A B C D E F G H 20F650 CHASSIS LAYOUT ...
Страница 29: ...29 6 5 4 3 2 1 A B C D E F G H 20F650 CRT BLOCK DIAGRAM ...
Страница 30: ...30 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 20F650 MAIN BLOCK DIAGRAM ...
Страница 31: ...31 10 11 12 13 14 15 16 17 18 19 20F650 ...
Страница 32: ...32 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 20F650 MTS BLOCK DIAGRAM ...
Страница 33: ...33 20F650 WAVEFORMS ...
Страница 35: ...35 6 5 4 3 2 1 A B C D E F G H 20F650 SCHEMATIC DIAGRAM CRT Unit ...
Страница 36: ...36 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 20F650 SCHEMATIC DIAGRAM MAIN Unit ...
Страница 37: ...37 10 11 12 13 14 15 16 17 18 19 20F650 ...
Страница 38: ...38 6 5 4 3 2 1 A B C D E F G H 20F650 SCHEMATIC DIAGRAM MTS Unit ...
Страница 39: ...39 6 5 4 3 2 1 A B C D E F G H 20F650 PWB B CRT Unit Wiring Side PRINTED WIRING BOARD ASSEMBLIES ...
Страница 40: ...40 6 5 4 3 2 1 A B C D E F G H 20F650 PWB A MAIN Unit Wiring Side ...