Soluciones y Tecnologías de Control Embebido S.A.P.I. de C.V.
www.sepradel.com [email protected] +52 1 833-389-4054
1
Introduction
The DG-3O1I-17 delay generator is a device based on an FPGA programmable gate array
device. The latter allows to have an input and three really independent output channels. Control
of the device is carried out both from its touch screen and from a personal computer or laptop
(PC) through a USB serial bus and a computer application running on the PC. The use of a PC is
optional, useful for example to operate the DG-3O11-17 as part of an automated installation.
The DG-3O1I-17 can be understood as a device that with one input stimulus pulse generates
three output pulses. These output pulses are generated some time after the input stimulus and
with the following properties:
1.
The delay between the input stimulus and the pulse of a given output is adjustable
and independent of any other output
2.
The pulse width of an output is adjustable and independent of any other output
3.
The digital logic
of a given output is adjustable and independent of the logic of any
other output
Fig. 1. Delay Generator front panel with input (IN) and outputs (OUT)
The figure above shows the panel with BNC connectors for “IN” input and “OUT” outputs. To
the left of each connector there is a light indication that can be yellow or red, depending on
whether the voltage is 0V or + 5V, respectively. In this way, when we connect a BNC cable to the
input, observing the color of the “IN” light indicator, we can determine the high or low level
presented.
2
In our case, by output with positive [negative] logic we will understand an output whose signal level
always remains at “0V” [“5V”] and only goes to high [low] or “5V” [“0V”] during emission of a pulse.
