SensL © 2011
27
USER MANUAL
HRM-TDC
SensL © 2011
27
> Sensl Integrated Environment (sie) > Using The Sensl Integrated Environment (sie)
Resync:
Using this method, the user must feed the programmable clock output to the Start input of any channel being
used. Once the configuration is selected, the user can start the module recording. The module will wait for the
first Start pulse and then start recording every stop event until the recording time is reached, the maximum event
count is reached or the process is manually stopped.
Figure 15 SIE screen for FIFO - Time Tagging
Programmable Clock Output
Free Running:
The Programmable Clock Output is made available for all modes and is used to set the frequency and duty
cycle of the internal programmable clock. This clock is available an SMA output for test purposes. This clock
is provided for testing and diagnostics only. The clock will exhibit a level of jitter that would not be suitable for
accurate measurements as part of an experiment.
Resync:
With the clock programmed to 1280 HI, 1280 LO (FSR register set to 0xFFFF) the module will operate in Resync.