CCOMe-C79
CCOMe-C79 - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R. - Reviewed by E.S. Copyright © 2021 SECO S.p.A.
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USB Data Port 0 -
USB0-
A45
B45
USB1-
USB Data Port 1-
USB Data Port 0 +
USB0+
A46
B46
USB1+
USB Data Port 1+
Real Time Clock power line
VCC_RTC
A47
B47
ESPI_EN#
eSPI enable Input
Reserved Purpose Signal
RSVD#A48
A48
B48
N.C.
Not Connected
Not Connected
N.C.
A49
B49
SYS_RESET#
Reset Button Input
LPC serial interrupt request
LPC_SERIRQ
A50
B50
CB_RESET#
Board Reset Output
Power Ground
GND
A51
B51
GND
Power Ground
PCI-E lane 5 tr
P
A52
B52
P
PCI-E lane 5 r
PCI-E lane 5 transmit -
PCIE_TX5-
A53
B53
PCIE_RX5-
PCI-E lane 5 receive -
GP Input 0 / SDIO data signal 0
GPI0/SD_DATA0
A54
B54
GPO1/SD_CMD
GP Output 1 / SDIO CMD output
PCI-E lane 4 tr
P
A55
B55
P
PCI-E lane 4 r
PCI-E lane 4 transmit -
PCIE_TX4-
A56
B56
PCIE_RX4-
PCI-E lane 4 receive -
Power Ground
GND
A57
B57
GPO2/SD_WP
GP Output 2 / SDIO WP input
PCI-E lane 3 tr
P
A58
B58
P
PCI-E lane 3 r
PCI-E lane 3 transmit -
PCIE_TX3-
A59
B59
PCIE_RX3-
PCI-E lane 3 receive -
Power Ground
GND
A60
B60
GND
Power Ground
PCI-E lane 2 tr
P
A61
B61
P
PCI-E lane 2 r
PCI-E lane 2 transmit -
PCIE_TX2-
A62
B62
PCIE_RX2-
PCI-E lane 2 receive -
GP Input 1 / SDIO data signal 1
GPI1/SD_DATA1
A63
B63
GPO3/SD_CD#
GP Output 3 / SDIO CD# input
PCI-E lane 1 tr
P
A64
B64
P
PCI-E lane 1 r
PCI-E lane 1 transmit -
PCIE_TX1-
A65
B65
PCIE_RX1-
PCI-E lane 1 receive -
Power Ground
GND
A66
B66
WAKE0#
PCI-express wake up signal
GP Input 2 / SDIO data signal 2
GPI2/SD_DATA2
A67
B67
WAKE1#
General purpose wake up signal
PCI-E lane 0 tr
P
A68
B68
P
PCI-E lane 0 r
PCI-E lane 0 transmit -
PCIE_TX0-
A69
B69
PCIE_RX0-
PCI-E lane 0 receive -
Power Ground
GND
A70
B70
GND
Power Ground
PCI-E lane 8 tr
P
A71
B71
P
PCI-E lane 8 r
PCI-E lane 8 transmit -
PCIE_TX8-
A72
B72
PCIE_RX8-
PCI-E lane 8 receive -
Power Ground
GND
A73
B73
GND
Power Ground
PCI-E lane 9 tr
P
A74
B74
P
PCI-E lane 9 r