14
Programming
This section outlines key aspects in programming IndustryPacks installed on the PCI-
60A.
The PCI-60A is normally programmed to occupy space above one megabyte. DOS,
including Microsoft's MS-DOS and IBM's PC-DOS, cannot access space above one
megabyte. "32-bit" operating systems, such as Windows NT, OS-9000, and SCO Unix,
can generally access space above one megabyte. Some operating systems may require
an intermediate piece of software to gain access to the hardware.
The PCI-60A has a Vendor ID of 0x124B and a Device ID of 0x0040. It has a Subsytem
Vendor ID of 0x124B and a Subsystem Device ID of 0. Before use, the PCI-60A must
have its Base
Address set by the system. This is done via the PCI configuration registers.
All accesses to the IndustryPacks on the PCI-60A are then relative to the Base Address.
In general, computing an exact address of a register within an IndustryPack requires the
addition of three numbers: the PCI-60A Base
Address, the Offset of the IndustryPack's
appropriate I/O space, and the Register
Offset within the IndustryPack. Generally, C
structures and C header files are used to perform these additions implicitly. The Offset of
the IndustryPack's I/O space is shown in Figure 2 in the
Addressing
section of this
manual. The Register
Offset is specific to each IndustryPack and is listed in its User
Manual.
The base address is determined during start-up by the PCI BIOS. Each device on the
PCI bus is interrogated during start-up. The BIOS writes out all ones to the BAR, then
reads it back. The card responds with zeroes in all the address bits it decodes. From this,
the BIOS determines how much space the device is requesting and assigns it a base
address. It then writes this address back to the BAR.
The PCI 9080 used on the PCI-60A for a PCI interface has registers that are tested by
the PCI BIOS during initialization. Based upon the results, two memory spaces and one
I/O space are allocated to the PCI-60A. The first memory space is contained in BAR0
and is the address of the PCI-9080 PCI accessible registers referred to as the Local
Configuration Registers, Runtime Registers, and Messaging Queue Registers in the PCI
9080 Datasheet. The second memory space is contained in BAR2 and is the address to
use for accessing the IndustryPacks and PCI-60 as Local Control registers. This is
referred to as the Local Address Space 0 in the PCI-9080 Datasheet. The I/O space for
the PCI 9080 accessible registers is contained in BAR1. Programming of the PCI 9080
registers from the IO space is not recommended. The PCI-60A does not use the PCI-
9080 BAR3 for Local Address Space 0.
The following figure shows a map of the PCI Configuration Registers. Refer to the PCI
2.1 specification and the PLX PCI 9080 Data Sheet for definitions of these registers.
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