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IC BLOCK DIAGRAM & DESCRIPTION
IC598,898 MX29LV800ATTC-70G(Flash emory)
SYMBOL
PIN NAME
Address Input
Data Input/Output
Q15 (Word mode)/LSB addr (Byte mode)
Chip Enable Input
Write Enable Input
Word/Byte Selection Input
Hardware Reset Pin
Output Enable Input
Ready/Busy Output
Power Supply Pin (2.7V~3.6V)
Ground Pin
A0~A18
Q0~Q14
Q15/A-1
CE
WE
BYTE
RESET
OE
RY/BY
VCC
GND
ADDRESS
LATCH
AND
BUFFER
SENSE
AMPLIFIER
PGM
DATA
HV
PROGRAM
DATA
LATCH
I/O BUFFER
Y-PASS
GATE
ARRAY
SOURCE
HA
MX29LV800T/B,
MX29LV800AT/AB
FLASH
ARRAY
X-DECODER
X-DECODER
COMMAND
DATA
DECODER
COMMAND
DATA LATCH
STATE
REGISTER
WRITE
STATE
MACHINE
(WSM)
PROGRAM/ERASE
HIGH VOLTAGE
CONTROL
INPUT
LOGIC
28
OE
11
WE
12
26
CE
RESET
1-8,
16-25,
48
A0-A18
29-26,
38-45
A0-A18