- 15 -
- 14 -
This is a basic schematic diagram.
TAPE_PLAY
V_CHECK
SYNC_REC
+5.6V
TU_DATA
NC
TU_CLK
POWER_RY
GND
BEAT
ST_BY
SURROUND
A_MUTE
VF_CE
TU_DO
TU_CLK
+5.6V
TU_DATA
D_GND
LID_SW
D_GND
KEY_2
D_GND
TU_CE
JP WIDE
R6121
US1
EU1
EU2
JP2
OPEN
0
8.2K
8.2K
MODEL
SS
10K
8.2K
10K
15K
8.2K
10K
15K
27K
C6215
Q6108
X6102
C6022
C6020
C6500
R6504
R6505
S6500
S6505
S6504
S6506
S6511
S6503
S6502
S6510
S6501
R6503
R6502
R6501
R6511
R6510
R6500
R6520
R6521
R6114
R6113
D6110
D6010
C6013
C6012
L6010
R6112
C6210
X6101
R6111
S6001
C6015
C6211
R6130
D6111
C6213
R6131
R6132
D6112
R6146
D6115
R6145
Q6107
C6212
Q6101
R6148
DS601
CN601
IC601
R6118
R6119
C6112
C6113
C6511
R6320 R6321 R6322
R6323
C6320
C6321
C6322
C6323
C6111
C6110
R6401 R6402 R6403 R6404 R6405 R6406
R6409
R6408
R6407
R6123
R6120
C6216
R6121
R6122
R6117
C6014
C6016
C6218
C6010
C6017
R6301
D6201
R6302
LCD61
R6303
D6202
R6304
R6411
R6410
CN602
R6801
R6802
R6803
R6804
R6805
R6806
C6018
C6114
C6324
R6412
R6413
33P
KTC3875
6MHZ
0.01
100/6.3
100P
1K
1.2K
CD_PLAY
FUNCTION
POWER
MEMORY
PRESET/PROG
TU/UP
TU/DOWN
TU/BAND
CD_STOP
820
680
470
470
390
390
4.7K
4.7K
10K
10K
1SS133
1SS133
0.01
0.01
2.2
1K
33P
32.7KHZ
1K
JOG
0.01
18P
10K
1SS133
1000P
100K
47K
1SS133
47K
MTZJ3.9B
3.3K
KTA1504
2.2/50
KTC3875
15K
LC877148A
1K
100
100P
100P
100P
100 100 100
100
100P
100P
100P
100P
100P
100P
100 1K 100 1K 1K 1K
10K
15K
15K
10K
47K
1000P
0
10K
100
0.01
100P
1000P
1000/6.3
100P
820
LCD LIGHT
820
820
FRONT LED
820
10K
10K
0
0
0
0
0
0
0.1
0.1
1000P
560K
560K
1
2
3
-1
-2
1
2
3
4
5
1
2
3
4
5
6
7
8
9 10 11 12 13 14
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9 10
25
55
56
SURR
50
49
48
44
43
42
41
35
34
33
32
31
30
29
28
26
24
VD_GND
FSYNC
15
16
53
54
63
P_CON
CD_RES
CD_CE
CD_CLK
WRQ
16
15
62
60
CD_DATA
74
25
26
3
24
LID_SW
KEY2
24
25
59
RESET
V_CHK
VD_GND
A_MUTE
P_CON
4
SYNC_REC
BEAT
VF_CE
57
59
60
DRF
MP3_CE
3
RESET
V_CHK
36
37
38
45
46
47
51
52
64
61
A_MUTE
SURR
28
29
30
31
32
33
34
35
36
37
64
63
62
55
56
57
61
53
52
51
50
54
49
45
46
47
48
44
43
42
41
38
CD_CMD
BEAT
SYNC_REC
KEY2
DRF
MP3_CE
FSYNC
WRQ
CD_CMD
CD_DATA
CD_CLK
CD_RES
CD_CE
LID_SW
4
VF_CE
RESET
WR_SEL
CD_CLK
CD_DATA
WR_SEL
74
V_CHECK
V_CHECK
TO CD SEC.
TO AMP SEC.
TUEV_DI
CD_WRQ
SYN_REC
XT1(I)
DATA_ENA
COM1
MP3_FSYNC
S1
KEY0
SEL_POW_RY
MP3_SEL
KEY1
LID_SW
TU_DIST
A_MUTE
VDD3
VD_GND
NC
TAPE_PLAY
TUEV_CL
TU_DO
TU_CE
RESET
VSS1
S12
IR
CF2(0)
CF1(I)
XT2(0)
VDD2
VSS2
VDD1
CD_DRF
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S13
S14
S15
S17
S19
S20
S21
S22
S23
S24
S25
S26
S27
S28
S18
S16
JOG-
JOG+
COM2
COM3
COM4
VSS3
SURROUND
CLK_SHIFT
CD_RST
CD_CE
CD_CMD
CD_CLK
MP3_CE
CD_DATA
V_CHK
LIMIT_SW
P_CON
TO TU SEC.
DRF
CE_MP3DSP
FSYNC
WRQ
CD_CMD
CD_DATA
CD_CLK
CD_RESET
CE_CDDSP
+9V
NC
POWER_RY
BEAT
VF_CE
TO WRITER TOOL
I/F_DATA
I/F_CLK
WR_SEL
RESET
GND
+5V
(EMC)
SCHEMATIC DIAGRAM (FRONT)