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Frame Relay for Sangoma Cards (C) Sangoma Technologies Inc. 1999,2000,2001 Page 11 of 78
The Shared Memory Control Block Structure
The control block structure is as follows:
Parameter
Off-
set
Lth
Remarks
OPP-FLAG
00H
1
A flag set by the application to inform the SDLA processor that a
COMMAND is pending. This flag is in turn reset by the processor
when the COMMAND has been completed.
COMMAN
D
01H
1
Command code.
BUFFER_
LENGTH
02H
2
Length of the data buffer associated with this call.
RETURN_
CODE
04H
1
Result of the previous command.
DLCI
05H
2
The Data Link Connection Identifier concerned with this command.
FECN_
BECN_DE_
CR_BITS
07H
1
FECN, BECN DE and C/R bits associated with the transmitted
Information frame.
RESERVED
08H
8
Reserved for later use.
DATA
10H
102
4
This is the transfer area for passing data associated with the various
commands to and from the application level.