S&T Kontron 3.5"-eIO-GPA, Руководство пользователя

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3.5"-eIO-GPA - User Guide, Rev. 1.0
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Pin Signal Description Note
19 eDP_ eDP / DP 0 Auxiliary channel pair (+)
20 eDP_DP0_AUX- eDP / DP 0 Auxiliary channel pair (-)
21 GND Ground
22 PCIE0_ PCIe Lane 0 clock reference pair (+)
23 PCIE0_CLK_REF- PCIe Lane 0 clock reference pair (-)
24 GND Ground
25 P PCIe Lane 0 transmitter pair (+)
26 PCIE0_TX- PCIe Lane 0 transmitter pair (-)
27 GND Ground
28 P PCIe Lane 0 receiver pair (+)
29 PCIE0_RX- PCIe Lane 0 receiver pair (-)
30 GND Ground
31 P PCIe Lane 2 receiver pair (+)
32 PCIE2_TX- PCIe Lane 2 receiver pair (-)
33 GND Ground
34 P PCIe Lane 2 receiver pair (+)
35 PCIE2_RX- PCIe Lane 2 receiver pair (-)
36 GND Ground
37 USB0_D- USB 2.0 differential pair (-)
38 USB 2.0 differential pair (+)
39 GND Ground
40 UART_TXD UART transmitted data +3.3 V
41 UART_RXD UART received data +3.3 V
42 UART_CTS# UART clear to send +3.3 V
43 UART_RTS# UART request to send +3.3 V
44 GND Ground
45 eDP_PWM eDP backlight PWM (Pulse Width Modulation) signal
46 eDP_VDDEN eDP panel power enable signal
47 eDP_BKLTEN eDP backlight enable signal
48 eDP_DO0_HPD eDP / DP 0 hot plug detect
49 eDP_DP0_EN# eDP / DP 0 enable
50 NC Not connected
51 GSPI_CLK Generic SPI clock +3.3 V
52 GSPI_MOSI Generic SPI master output / slave input +3.3 V
53 GSPI_MISO Generic SPI master input / slave output +3.3 V
54 GSPI_CS0# Generic SPI chip select bit 0 +3.3 V
55 GSPI_CS1# Generic SPI chip select bit 1 +3.3 V
56 GND Ground
57 DP 1 Lane 0 transmitter pair (+)
58 DP1_TX0- DP 1 Lane 0 transmitter pair (-)
59 GND Ground
60 DP 1 Lane 1 transmitter pair (+)