RCVDL56DPFL/SP, RCV56DPFL/SP, and RCV336DPFL/SP Designer’s Guide
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3-1
3. SOFTWARE INTERFACE
Modem data pump functions are implemented in MDP DSP firmware (code).
3.1 INTERFACE MEMORY
The MDP DSP communicates with the host processor by means of a dual-port, interface memory. The interface memory
contains thirty-two 8-bit registers, labeled register 00 through 1F. Each register can be read from, or written into, by both the
host and the DSP. The host communicates with the MDP interface memory via the microprocessor bus.
The host can control MDP operation by writing control bits to DSP interface memory and writing parameter values to DSP
RAM through the interface memory. The host can monitor MDP operation by reading status bits from DSP interface memory
and reading parameter values from DSP RAM through interface memory.
3.1.1 Interface Memory Map
An interface memory map of the 32 addressable registers in the MDP is shown in Figure 3-1. These 8-bit registers may be
read or written during any host read or write cycle. In order to operate on a single bit or a group of bits in a register, the host
processor must read a register then mask out unwanted data. When writing a single bit or group of bits in a register, the host
processor must perform a read-modify-write operation. That is, read the entire register, set or reset the necessary bits
without altering the other register bits, then write the unaffected and modified bits back into the interface memory.
3.1.2 Interface Memory Signal Definitions
The individual bits in the interface memory are defined in Table 3-1. The bits in the interface memory are referred to using
the format Z:Q. The register number is specified by Z (00 through 1F) and the bit number by Q (0 through 7, 0 = LSB).
Содержание RC336DPFL
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