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08) Test Emulation RAM STEP Operation
A) Step Operation ............................OK
Shows the check results for the
step execution controlling
circuits in the E6000 (normal
completion).
09) Test Keybreak
A) Key Break .................................OK
Shows the check results for the
forced break controlling
circuits in the E6000 (normal
completion).
10) Test Emulation RAM Hardware Break
A) GRD Break .................................OK
B) WPT Break .................................OK
C) WPT(ROM) Break ............................OK
Shows the check results for the
illegal access break controlling
circuits in the E6000 (normal
completion).
11) Test Internal ROM Write Protect
A) Write-Protect .............................OK
Shows the check results for the
internal ROM write-protection
controlling circuits in the
E6000 (normal completion).
12) Test Hardware Break
A) Break Point Initialized ...................OK
B) Event Detectors CES channel 1-12 ..........OK
C) Test Sequencing 1 .........................OK
D) Check Range Break .........................OK
E) Range Break Test for Data .................OK
F) Check Compare Either ......................OK
Shows the check results for the
hardware break control circuits
in the E6000 (normal
completion).
13) Test Emulation RAM Trace
A) Free Trace ................................OK
Shows the check results for the
trace controlling circuits in the
E6000 (normal completion).