UM-PM-029
DA9213, DA9214, and DA9215 Performance
Boards
User Manual
Revision 2.0
25-Feb-2022
CFR0012
29 of 37
© 2022 Renesas Electronics
Table 3: DA9215 Performance Board (227-07-B) Links Description
Link
Position 1
(Pin 1-2)
Position 2
(Pin 2-3)
Function
J1
To VSYS
Enables diode D1 when VSYS supply is connected
J5
BUCKB local VOUT
BUCKB VOUT local headers
J7
BUCKB local GND
BUCKB VSS local headers
J8
BUCKA local GND
BUCKA VSS local headers
J9
To GND
Short VSYS to GND
J13
To clock input
Connects GPIO1 to plug for external clock input
signal
J14
to VOUT
Connects LB1 to the output of the BUCKB converter
J15
To VOUT
Connects LA3 to the output of the BUCKA converter
J17
Signal headers
I/Os and main signals
J18
to VSYS
Connects VSYS pin to the VSYS rail
J20
To VOUT
Connects LA1 to the output of the BUCKA converter
J21
To VOUT
Connects LA2 to the output of the BUCKA converter
J22
to VDDIO
Connections for GPIOs pull up resistors
J23
BUCKA local VOUT
BUCKA VOUT local headers
J25
to VDDIO
c
onnections for nIRQ (via 100 kΩ pull up resistors)
J26
Connects GPIOs to
100 kΩ pull up resistors
J27
Connection for GPIOs
J28
to VDDIO
Connection for I
2
C interface pull up (via 2.2
kΩ
resistors)
J29
Connects GPIOs to GND (via
100 kΩ pull down
resistors)
J30
to VDDIO
(via 100
kΩ resistor)
to GND
(via 1
kΩ resistor)
Connection for IC_EN
J31
Connects GPIOs to ATSAM3U
J32
to ATSAM3U port
to J29
Connection for IC_EN
J33
to SPI_SCLK
to SCL_0
Selection of SPI or I
2
C clock
J34
to SPI_MOSI
to SDA_0
Selection of SPI or I
2
C data
J39
to VDDIO_OUT
Connects VDDIO to the VDDIO_OUT rail generated
by external LDO
J40
to VDDIO_OUT
Connection of VDDIO_USB used by ATSAM3U
J38
low voltage VDDIO
Selection of VDDIO_OUT voltage:
open => 3.3 V
short => 1.8 V