RTL8100
2001/12/10
Rev.1.0
7
2.2 The Packet Header
Bit
R/W
Symbol
Description
15 R MAR
Multicast Address Received:
This bit set
to 1 indicates that a multicast
packet is received.
14 R PAM
Physical Address Matched:
This bit set
to 1 indicates that the destination
address of this packet matches the value written in ID registers.
13 R BAR
Broadcast Address Received:
This bit set
to 1 indicates that a broadcast
packet is received. BAR, MAR bit will not be set simultaneously.
12-6 -
-
Reserved
5 R ISE
Invalid Symbol Error:
(100BASE-TX only) This bit set to 1 indicates that an
invalid symbol was encountered during the reception of this packet.
4 R RUNT
Runt Packet Received:
This bit set to 1 indicates that the received packet
length is smaller than 64 bytes ( i.e. media data + CRC < 64 bytes )
3 R LONG
Long Packet:
This bit set to 1 indicates that the size of the received packet
exceeds 4k bytes.
2 R CRC
CRC Error:
When set, indicates that a CRC error occurred on the received
packet.
1 R FAE
Frame Alignment Error:
When set, indicates that a frame alignment error
occurred on this received packet.
0 R ROK
Receive OK:
When set, indicates that a good packet is received.
2.3 The Transmission Process
The following process describes the reception of a packet.
1. Data received from the line is stored in the receive FIFO.
2. When the early receive threshold is met, data is moved from the FIFO to the receive buffer.
3. After the whole packet is moved from the FIFO to the receive buffer, the receive packet header (receive status and
packet length) is written in front of the packet. CBA is updated to the end of the packet.
4. CMD (BufferEmpty) and ISR (TOK) is set.
5. An ISR routine is called and then the driver clears ISR (TOK) and updates CAPR.
2.4 Registers Involved
1. RBStart: Receive Buffer start address.
2. CR (BufferEmpty): Indicates if driver is empty.
3. CAPR: Buffer read pointer.
4. CBP: Buffer write pointer.
5. ISR/IMR (ROK, RER, RxOverflow, RxFIFOOverflow)
6. RCR: Receive Configuration register.
7. Packet
Header.