Racal Instruments 3155, Руководство пользователя

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User Manual 3155
Programming Reference 4-70
Standard Event
Status Register
(ESR) The Standard Event Status Register reports status for special appli-
cations. The 8 bits of the ESR have been defined by the IEEE-STD-
488.2 as specific conditions, which can be monitored and reported
back to the user upon request. The Standard Event Status Register
is destructively read with the *ESR? common query. The Standard
Event Status Register is cleared with a *CLS common command,
with a power-on and when read by *ESR?.
The arrangement of the various bits within the register is firm and is
required by all GPIB instruments that implement the IEEE-STD-
488.2. Description of the various bits is given in the following:
Bit 0 - Operation Complete. Generated in response to the *OPC
command. It indicates that the device has completed all selected and
pending operations and is ready for a new command.
Bit 1 - Request Control. This bit operation is disabled on the Model
3155.
Bit 2 - Query Error. This bit indicates that an attempt is being made
to read data from the output queue when no output is either present
or pending.
Bit 3 - Device Dependent Error. This bit is set when an error in a de-
vice function occurs. For example, the following command will cause
a DDE error:
VOLTage 5;:VOLTage:OFFSet 2
Both of the above parameters are legal and within the specified lim-
its, however, the generator is unable to generate such amplitude and
offset combination.
Bit 4 - Execution Error. This bit is generated if the parameter follow-
ing the command is outside of the legal input range of the generator.
Bit 5 – Command Error. This bit indicates the generator received a
command that was a syntax error or a command that the device does
not implement.
Bit 6 - User Request. This event bit indicates that one of a set of lo-
cal controls had been activated. This event bit occurs regardless of
the remote or local state of the device.
Bit 7 - Power On. This bit indicates that the device's power source
was cycled since the last time the register was read.