Rabbit 6000 User’s Manual
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20
2.3 Operation
2.3.1 Main Clock
The main clock is based on the main oscillator output, which in turn is driven by the CLK_HSI and
CLK_HSO pins. This output serves as the input for the main PLL, which can be programmed for various
frequencies or bypassed completely. There is an option for the resulting output to then be sent through the
spectrum spreader and then the clock doubler, which are described later. This resulting clock is the main
clock.
Different main clock modes may be selected via the GCSR, as shown in Table 2-2. Note that one GCSR
setting slows the processor clock while the peripheral clock operates at full speed; this allows some power
reduction while keeping settings like serial baud rates and the PWM at their desired values.
When the 32 kHz clock is enabled in GCSR, it can be further divided by 2, 4, 8, or 16 to generate even
lower frequencies by enabling those modes in bits 0–2 of GPSCR. See Table 2-6 for more details.
Table 2-2. Clock Modes
GCSR Setting
Processor Clock
Peripheral Clock
xxx010xx
Main clock
Main clock
xxx011xx
Main clock / 2
Main clock / 2
xxx110xx
Main clock / 4
Main clock / 4
xxx111xx
Main clock / 6
Main clock / 6
xxx000xx
Main clock / 8
Main clock / 8 (default on startup)
xxx001xx
Main clock / 8
Main clock
xxx100xx
32 kHz clock (possibly divided)
32 kHz clock (possibly divided via
GPSCR)
xxx101xx
32 kHz clock (possibly divided);
main clock disabled via CLKIEN output
signal
32 kHz clock (possibly divided via
GPSCR)
Содержание 6000
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