
QM1013-101 0.001-6 GHz Single Channel Upconverter
User Manual
3. System Block Diagram
A System block diagram for the QM1013-101 0.001-6 GHz Single Channel Upconverter is shown in Fig-
ure 1.2. Internal attenuators in the upconverter block are controlled digitally via a microcontroller, which
interfaces to a PC through USB or TCP/IP. The microcontroller outputs basic status messages on a 32-
character Liquid Crystal Display (LCD) mounted on the faceplate of the unit. An internal 10 MHz reference
clock is phase-locked to all of the internal LOs, with a BNC-F connector providing the option for LOs to
lock to a user-provided 10 MHz external reference. An additional BNC-F connector forwards the 10 MHz
reference back out for use by external test equipment. Switching between the internal and external LO
reference clocks is controlled either by the microcontroller or a reference selector switch.
Figure 1.2:
QM1013–101 Upconverter Block Diagram
Quonset Microwave
Revision 1.0.1
6