UMTS/HSPA+ Standard Module Series
UC200T-GL Mini PCIe Hardware Design
UC200T-GL_Mini_PCIe_Hardware_Design 26 / 51
The following table shows the pin definition of PCM and I2C interfaces that can be applied in audio codec
design.
Table 10: Pin Definition of PCM and I2C Interfaces
UC200T-GL Mini PCIe provides one PCM digital interface, which supports 16-bit linear data format and
the following modes:
Primary mode (short frame synchronization, works as either master or slave)
Auxiliary mode (long frame synchronization, works as master only)
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256kHz, 512kHz, 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC, and also supports 4096kHz
PCM_CLK at 16kHz PCM_SYNC. The following figure shows the timing relationship in primary mode with
8kHz PCM_SYNC and 2048kHz PCM_CLK.
Pin Name
Pin No.
I/O
Power Domain
Description
PCM_CLK
45
IO
1.8V
PCM clock
PCM_DOUT
47
DO
1.8V
PCM data output
PCM_DIN
49
DI
1.8V
PCM data input
PCM_SYNC 51
IO
1.8V
PCM frame synchronization
I2C_SCL 30 DO
1.8V
I2C serial clock.
Require external pull-up to 1.8V.
I2C_SDA 32 IO 1.8V
I2C serial data.
Require external pull-up to 1.8V.
