Smart Wi-Fi Module Series
SC20-WL Hardware Design
SC20-WL_Hardware_Design
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10uF
EN
VIN
SW
NC
VOUT
VOUT
4
5
1
7
8
6
2
9
3
A
G
N
D
P
G
N
D
P
G
N
D
10K
22uF/
10V
1.0uH
AW3605DNR
USB_DP
USB_DM
USB_VUSB
USB_ID
1
2
3
4
5
USB_DP
USB_DM
VUSB
USB_ID
GND
G
N
D
G
N
D
G
N
D
G
N
D
6
7
8
9
100nF
Module
VBAT
GPIO
VBAT
C1
C2
L1
U1
R1
C3
D1
D2
D3
D4
ESD
ESD
ESD
ESD
D5
Figure 14: USB Interface Reference Design (OTG is Supported)
SC20-WL supports OTG protocol. If OTG function is needed, please refer to the above figure for the
reference design. AW3605DNR is a high efficiency DC-DC chip manufactured by AWINIC, and users can
choose according to their own demands.
In order to ensure USB performance, please comply with the following principles while designing USB
interface.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90
Ω.
Keep the ESD protection devices as close as possible to the USB connector. Pay attention to the
influence of junction capacitance of ESD protection devices on USB data lines. Typically, the
capacitance value should be less than 2pF.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.
Make sure the trace length difference between USB_DM and USB_DP is not exceeding 6.6mm.
Table 7: USB Trace Length inside the Module
Pin
Signal
Length (mm)
Length Difference (DP-DM)
13
USB_DM
29.43
-0.07
14
USB_DP
29.36