GSM/GPRS Module Series
M85 Hardware Design
M85_Hardware_Design Confidential / Released 56 / 88
3.11.1. Configuration
M85 module supports 13-bit line code PCM format. The sample rate is 8 KHz, and the clock source is 256
KHz, and the module can only act as master mode. The PCM interface supports both long and short
synchronization simultaneously. Furthermore, it only supports MSB first. For detailed information, please
refer to the table below.
Table 16: Configuration
3.11.2. Timing
The sample rate of the PCM interface is 8 KHz and the clock source is 256 KHz, so every frame contains
32 bits data, since M85 supports 16 bits line code PCM format, the left 16 bits are invalid. The following
diagram shows the timing of different combinations. The synchronization length in long synchronization
format can be programmed by firmware from one bit to eight bits. In the Sign extension mode, the high
three bits of 16 bits are sign extension, and in the Zero padding mode, the low three bits of 16 bits are
zero padding.
Under zero padding mode, you can configure the PCM input and output volume by executing
AT+QPCMVOL
command. For more details, please refer to
Chapter 3.11.4
.
PCM
Line Interface Format
Linear
Data Length
Linear: 13 bits
Sample Rate
8KHz
PCM Clock/Synchronization Source
PCM master mode: clock and synchronization is
generated by module
PCM Synchronization Rate
8KHz
PCM Clock Rate
PCM master mode: 256 KHz (line)
PCM Synchronization Format
Long/short synchronization
PCM Data Ordering
MSB first
Zero Padding
Yes
Sign Extension
Yes