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EP06 module provides one PCM digital interface*, which supports 8-bit A-law and
μ-law, and also
supports 16-bit linear data formats and the following modes:
Primary mode (short frame synchronization, works as either master or slave)
Auxiliary mode (long frame synchronization, works as master only)
“*” means under development.
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, PCM_CLK supports 128, 256, 512,
1024 and 2048kHz for different speed codecs. The following figure shows the timing relationship in
primary mode with 8kHz PCM_SYNC and 2048kHz PCM_CLK.
PCM_CLK
PCM_SYNC
PCM_DOUT
MSB
LSB
MSB
125us
1
2
256
255
PCM_DIN
MSB
LSB
MSB
Figure 6: Timing in Primary Mode
In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge; while the PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a
128kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC only. The following figure shows the timing
relationship in auxiliary mode with 8kHz PCM_SYNC and 128kHz PCM_CLK.
NOTE
