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QDFLD25

‐

xxx(M/G)UH1(I)

Datasheet

80000-FLD25-xxx(M/G)UH1(I)-March2011

- 14 -

Figure 9: Sustained Ultra DMA Mode Data-out Burst Timing Diagram

Table 15: Timing Diagram, Ultra DMA Mode 0-4

Ultra DMA timing parameters

Mode 0

Mode 1

Mode 2

Mode 3

Mode 4

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

2CYC

Typical sustained average two cycle time

240

160

120

CYC

Cycle time allowing for asymmetry and

clock variations (from STROBE edge to

STROBE edge)

112 - 73 - 54 - 39 - 25 -

2CYC

Two cycle time allowing for clock variations

(from rising edge to next rising edge or from

falling edge to next falling edge of

STROBE)

230 - 153 - 115 - 86 - 57 -

Data

setup

time

(at

recipient)

15 - 10 - 7 - 7 - 5 -

Data

hold

time

(at

recipient)

5 - 5 - 5 - 5 - 5 -

DVS

Data valid setup time at sender (from data

bus being valid until STROBE edge)

70 - 48 - 31 - 20 - 6.7 -

DVH

Data valid hold time at sender (from

STROBE edge until data may become

invalid)

6.2 - 6.2 - 6.2 - 6.2 - 6.2 -

First STROBE time (for device to first

negate DSTROBE from STOP during a data

in burst)

- 230 - 200 - 170 - 130 - 120

Ultra DMA timing parameters

Mode 0

Mode 1

Mode 2

Mode 3

Mode 4

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Limited

interlock

time

0 150 0 150 0 150 0 100 0 100

MLI

Interlock

time

with

minimum

20 - 20 - 20 - 20 - 20 -

Содержание QDFLD25-***GUH1 Series

Страница 1: ... and endurance Key features include Built in ECC engine detects up to 5 byte and corrects up to 4 byte errors Sophisticated block management and wear leveling algorithms guarantees 4 000 000 write erase cycles Power down data protection ensures data integrity and errors in case of power loss Lifecycle management feature allows users to monitor the device s block management Quantum Digital s 2 5 ID...

Страница 2: ... 4 GBytes QDFLD25 8GUH1 I 2 5 inch 44 pin 8 GBytes QDFLD25 16GUH1 I 2 5 inch 44 pin 16 GBytes QDFLD QDT standard 2 5 IDE Flash Drive part number prefix 25 2 5 inch form factor M G proceeding capacity xxx is in Megabytes M or Gigabytes G H1 QDT H1 controller U RoHS 6 compliant lead free Part numbers without I Commercial temperature range 0ºC to 70ºC I Industrial temperature range 40ºC to 85 ºC F me...

Страница 3: ...UCT SPECIFICATIONS 4 2 1 SYSTEM ENVIRONMENTAL SPECIFICATIONS 4 2 2 SYSTEM POWER REQUIREMENTS 4 2 3 SYSTEM PERFORMANCE 4 2 4 SYSTEM RELIABILITY 5 2 5 PHYSICAL SPECIFICATIONS 5 2 6 CAPACITY SPECIFICATIONS 6 3 INTERFACE DESCRIPTION 7 3 1 PHYSICAL DESCRIPTION 7 3 2 PIN ASSIGNMENTS 7 3 3 ELECTRICAL DESCRIPTION 8 3 4 ELECTRICAL SPECIFICATION 9 3 4 1 ABSOLUTE MAXIMUM RATING 9 3 4 2 RECOMMENDED OPERATING ...

Страница 4: ...TIONS 10 4 COMMAND DESCRIPTIONS 16 4 1 COMMAND SET 16 5 INSTALLATION PROCEDURE 17 5 1 BEFORE UNPACKING 17 5 2 ESD PRECAUTIONS 17 5 3 IDE DEVICE SETUP AUTO DETECTION 17 5 4 PARTITION FORMAT 18 APPENDIX A ORDERING INFORMATION ERROR BOOKMARK NOT DEFINED PART NUMBER LIST ERROR BOOKMARK NOT DEFINED ...

Страница 5: ... extremely light weight reliable low profile form factor The Industrial 2 5 PATA IDE SSD provides a high level interface to the host computer This interface allows a host computer to issue commands to the SSD to read or write blocks of memory The host addresses the card in 512 byte sectors Each sector is protected by a powerful 4 bits Error Correcting Code ECC The Industrial 2 5 PATA IDE SSD it us...

Страница 6: ...eless z Optional for conformal coating special PCB surface coating treatment 1 3 ATA ATAPI 6 Standard The Industrial 2 5 PATA IDE SSD disks are fully compatible with the ATA ATAPI 6 standard 1 4 Technology Independence Static Wear Leveling In order to gain the best management for flash memory the Industrial Rugged Metal 2 5 PATA IDE SSD supports Static Wear leveling technology to manage the Flash ...

Страница 7: ...of silicone coating features good thermal shock resistance due to flexibility It is also easy to apply and repair Conformal coating offers protection of circuitry from moisture fungus dust and corrosion caused by extreme environments It also prevents damage from those Flash storages handling during construction installation and use and reduces mechanical stress on components and protects from ther...

Страница 8: ... Grade Industrial Grade DC Input Voltage VCC 100mV max ripple p p 5 V 10 5V Current Maximum average value Reading Mode 124 0 mA Max Writing Mode 121 0 mA Max Idle Mode 1 8 mA Max 2 3 System Performance Table 3 System Performances Data Transfer Mode supporting PIO mode 0 1 2 3 4 Default PIO 4 MWDMA mode 0 2 UDMA Mode 0 1 2 3 4 Default UDMA 4 Data Transfer Rate To Form Host 16 6Mybtes sec burst unde...

Страница 9: ...er than 2 000 000 cycles Logically contributed by Wear leveling and advanced bad sector management Data Retention 10 years 2 5 Physical Specifications Refer to Table 5 and see Figure 2 for Industrial 2 5 PATA IDE SSD physical specifications and dimensions Table 5 Physical Specifications 2 5 PATA IDE SSD Length 99 70 0 25mm 4 0 0 010 in Width 69 9 0 25mm 2 76 0 1 010 in Thickness 9 5 0 25mm 0 4 0 0...

Страница 10: ...lt number of heads sectors track and cylinders Table 6 Device Parameter Unformatted Capacity Default Cylinder Default Head Default Sector Default CHS Capacity 128MB 497 16 32 254 464 256MB 984 16 32 503 808 512MB 1 001 16 63 1 009 008 1 024MB 2 002 16 63 2 018 016 2 04GB 4 003 16 63 4 035 024 4GB 8 006 16 63 8 070 048 8GB 16 000 16 63 16 128 000 16GB 32 235 16 63 32 492 880 ...

Страница 11: ...ame Description 1 HRESET Host Reset 2 GND Ground 3 HDB 7 Host Data Bit 7 4 HDB 8 Host Data Bit 8 5 HDB 6 Host Data Bit 6 6 HDB 9 Host Data Bit 9 7 HDB 5 Host Data Bit 5 8 HDB 10 Host Data Bit 10 9 HDB 4 Host Data Bit 4 10 HDB 11 Host Data Bit 11 11 HDB 3 Host Data Bit 3 12 HDB 12 Host Data Bit 12 13 HDB 2 Host Data Bit 2 14 HDB 13 Host Data Bit 13 15 HDB 1 Host Data Bit 1 16 HDB 14 Host Data Bit 1...

Страница 12: ...ion Pin No Signal Name Type Description 1 HRESET I Host reset signal High Reset 37 CS0 I Chip select CS0 38 CS1 I Chip select CS1 31 INTRQ O Host interrupt signal 25 HIOR 3 I I O read strobe signal HDMARDY 4 DMA ready during Ultra DMA data in burst HSTROBE 4 Data strobe during Ultra DMA data out burst 23 HIOW 3 I I O write strobe signal STOP 4 Stop during Ultra DMA data bursts 32 IOCS16 O Asserted...

Страница 13: ...n PIO Multiword DMA mode Signal usage in Ultra DMA mode 3 4 Electrical Specification Table 10 Table 11 and Table 12 defines all D C Characteristics for the Industrial 2 5 PATA IDE SSD Unless otherwise stated a condition is as below Table 9 Table 9 Electrical Condition Standard Grade Industrial Grade Vcch 5V 10 Ta 0 C to 70 C Vcch 5V 10 Ta 40 C to 85 C 3 4 1 Absolute Maximum Rating Table 10 Absolut...

Страница 14: ...Supply VCCF 3 0 3 3 3 6 V Input low voltage VIL 0 3 0 8 V Input high voltage VIH 2 0 Vcc 0 3 V Output low voltage VOL 0 45 at 4mA V Output high voltage VOH 2 4 at 1mA V Operating CurrentV Sleep Mode Operation Icc 1 4 140 mA mA Input Leakage Current ILI 10 uA Output leakage current LLO 10 μA Input output Capacitance CI O 10 pF 3 4 4 Timing Specifications PIO Mode Figure 4 Read Write Timing Diagram ...

Страница 15: ... 25 t3 HIOW data setup min 60 45 30 30 20 t4 HIOW data hold min 30 20 15 10 10 t5 HIOR data setup min 50 35 20 20 20 t6 HIOR data hold min 5 5 5 5 5 t6z HIOR data tri state max 30 30 30 30 30 t7 Address valid to IOCS16 assertion max 90 50 40 n a n a t8 Address valid to IOCS16 released max 60 45 30 n a n a t9 HIOR HIOW to address valid hold 20 15 10 10 10 tRD Read data valid to IORDY active min 0 0...

Страница 16: ...0 60 50 tF HIOR data hold min 5 5 5 tG HIOR HIOW data setup min 100 30 20 tH HIOW data hold min 20 15 10 tI DMACK to HIOR HIOW setup min 0 0 0 tJ HIOR HIOW to DMACK hold min 20 5 5 tKR HIOR negated width min 50 50 25 tKW HIOW negated width min 215 50 25 tLR HIOR to DMARQ delay max 120 40 35 tLW HIOW to DMARQ delay max 40 40 35 tM CS1 CS0 valid to HIOR HIOW 50 30 25 tN CS1 CS0 hold 15 10 10 tZ DMAC...

Страница 17: ...QDFLD25 xxx M G UH1 I Datasheet 80000 FLD25 xxx M G UH1 I March2011 13 Figure 7 Ultra DMA Mode Data out Burst Initiation Timing Diagram Figure 8 Sustained Ultra DMA Mode Data in Burst Timing Diagram ...

Страница 18: ...om rising edge to next rising edge or from falling edge to next falling edge of STROBE 230 153 115 86 57 tDS Data setup time at recipient 15 10 7 7 5 tDH Data hold time at recipient 5 5 5 5 5 tDVS Data valid setup time at sender from data bus being valid until STROBE edge 70 48 31 20 6 7 tDVH Data valid hold time at sender from STROBE edge until data may become invalid 6 2 6 2 6 2 6 2 6 2 tFS Firs...

Страница 19: ...from DMACK to STOP and HDMARDY during data out burst initiation 20 70 20 70 20 70 20 55 20 55 tRFS Ready to final STROBE time no STROBE edges shall be sent this long after negation of DMARDY 75 70 60 60 60 tRP Ready to pause time time that recipient shall wait to initiate pause after negating DMARDY 160 125 100 100 100 tIORDYZ Pull up time before allowing IORDY to be released 20 20 20 20 20 tZIORD...

Страница 20: ...e Device Diagnostic 90H Erase Sector C0H Format Track 50H Identify Device ECH Idle 97H or E3H Idle immediate 95H or E1H Initialize Device Parameters 91H NOP 00H Read Buffer E4H Read Long Sector 22H or 23H Read Multiple C4H Read Sector 20H or 21H Read Verify Sector 40H or 41H Recalibrate 1XH Seek 7XH Set Features EFH Set Multiple Mode C6H Set Sleep Mode 99H or E6H Standby 96H or E2H Standby Immedia...

Страница 21: ...ese instructions may void your warranty 1 Always take all proper electrostatic discharge ESD precautions including personnel and equipment grounding 2 Always operate the SSD within the environmental specifications 3 Always use a grounded wrist strap when handling the SSD Drives that are not installed in the system are sensitive to ESD damage 5 3 IDE Device Setup Auto Detection Most BIOS have an en...

Страница 22: ...ms if you can t auto detect a drive from the BIOS you know you have a problem even before you try to boot up 5 4 Partition Format Before you install your operating system you must first create a primary partition on the 2 5 PATA IDE SSD on the system and then format a file system on that partition The Fdisk tool is an MS DOS based tool that you can use to prepare partition the 2 5 PATA IDE SSD You...

Страница 23: ...m does not support drives that are smaller than 512 MB When you run the fdisk and format commands the Master Boot Record MBR and file allocation tables are created The MBR and file allocation tables store the necessary disk geometry that allows 2 5 PATA IDE SSD to accept store and retrieve data ...

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