EPAQ-9410
Hardware Programming Reference 0.16
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Copyright © 2019 QEI
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3
2
1
0
CH8_RXD_SEL
The CH8_RXD_SEL register controls the configuration of the CH8_RXD and
CH8_CTS# signals.
The table below summarizes supported values for CH8_RXD_SEL register.
Value
Description
0x0
CH8_RXD = 1 (mark/idle), CH8_CTS# = 0 (asserted)
{CH8_RXD, CH8_CTS_L} = {1'b1, 1'b0};
0x1
//connected to IRIG_FIBER_TX_NI
{CH8_RXD, CH8_CTS_L} =
{IRIG_FIBER_RX_NI, 1'b0};
0x2
//connected to IRIG_B_RS485_RXD
{CH8_RXD, CH8_CTS_L} =
{IRIG_B_RS485_RXD, 1'b0};
0x3
//loopback
{CH8_RXD, CH8_CTS_L} =
{CH8_TXD, CH8_RTS_L};
0x4-0xF
//same as 0 but de-assert CTS
{CH8_RXD, CH8_CTS_L} =
{1'b1, 1'b1};
3.10.7 COM_EXP_IRIG-B Register
Register Name: COMM_EXP_IRIG_B_SEL
Address: 0xB402_0007
Access type: write-only
3
2
1
0
COMM_EXP_IRIG_B_SEL
The COMM_EXP_IRIG_B_SEL register controls the configuration of the
COMM_EXP_IRIG-B signal.
The table below summarizes supported values for COMM_EXP_IRIG_B_SEL register.
Value
Description
0x0
0, COMM_EXP_IRIG-B signal is driven low
0x1
1, COMM_EXP_IRIG-B signal is driven high
0x2
COMM_EXP_IRIG-B = IRIG_SIGNAL_BUS
0x3-0xF
reserved for future use, same as 0x0
3.10.8 Telco [1,2] Mode Register
Register Name: CH[14,15]_SEL
Address: [14]: 0xB402_0008, [15]: 0xB402_000A
