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BIOS Description
BIOS Description
BIOS Description
BIOS Description
BIOS Description
QDI
QDI
QDI
QDI
QDI
DRAM Clock/Drive Control
Item
Option Description
DRAM Timing
Auto By SPD
DDR Timing is defined by SPD.
Manual
Sets DDR Timing manually.
Turbo
Ultra
DRAM CAS
1.5T/2T/2.5T/3T
Define the latency between the SDRAM read com-
Latency
mand and the time the data actually becomes
available.
Bank Interleave
2 Bank,4 Bank
Sets bank interleave,2 bank or 4 bank.
Disabled
Disable bank interleave technology.
Precharge to
2T/3T/4T/5T
Define the idle clocks after issuing a precharge
Active (Trp)
command to the SDRAM.
Tras Non-DDR400
6T/8T,5T/6T
Define the number of SDRAM clocks used for
/DDR400
7T/10T,8T/12T
SDRAM parameters.
Active to
2T/3T/4T/5T
Define the latency between the SDRAM active
CMD (Trcd)
command and the Read / Write command.
DRAM Burst
4
Set the DRAM Burst Length.
Length
8
DRAM Command
1T Command
Defines the DRAM command rate.
Rate
2T Command
Write Recovery
2T/3T
Set the DRAM write Recovery Time.
Time
twTR for DDR400
1T/2T/3T
Set the twTR for DDR400 timing.
only
Содержание K7VM400M Pro Series
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Страница 61: ...Mainboard Layout K7VM400M Note The layout includes all options It is for your reference only ...