Chapter 4 Award BIOS Setup
Page: 4-14
PPC-7368 USER
′
S MANUAL
PCI DELAY TRANSACTION :
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select
Enabled
to support compliance with PCI
specification version 2.1.
PCI#2 ACCESS #1 RETRY :
When disabled, PCI#2 will not be disconnected until access finishes (default).
When enabled, PCI#2 will be disconnected if max retries are attempted
without success.
Содержание PPC-7368
Страница 1: ...USER S MANUAL PPC 7368 VIA Eden Low Power 8 4 Panel PC System PPC 7368 M1...
Страница 9: ...Chapter 1 Introduction PPC 7368 USER S MANUAL Page 1 3 1 2 CASE ILLUSTRATION...
Страница 20: ...Chapter 2 Hardware Configuration PPC 7368 USER S MANUAL Page 2 5 JUMPER DIAGRAMS JUMPER SETTINGS...
Страница 89: ...Appendix A System Assembly Page A 2 PPC 7368 USER S MANUAL EXPLODED DIAGRAM FOR WHOLE SYTEM UNIT...
Страница 90: ...Appendix A System Assembly PPC 7368 USER S MANUAL Page A 3 EXPLODED DIAGRAM FOR REMOVING HOOK HOLDER...
Страница 91: ...Appendix A System Assembly Page A 4 PPC 7368 USER S MANUAL EXPLODED DIAGRAM FOR REMOVING BACK COVER...
Страница 92: ...Appendix A System Assembly PPC 7368 USER S MANUAL Page A 5 EXPLODED DIAGRAM FOR REMOVING LCD ASSEMBLY...
Страница 93: ...Appendix A System Assembly Page A 6 PPC 7368 USER S MANUAL EXPLODED DIAGRAM FOR FRONT PANEL...
Страница 94: ...Appendix A System Assembly PPC 7368 USER S MANUAL Page A 7 EXPLODED DIAGRAM FOR CUT OUT DIMENSION...
Страница 97: ...Appendix B Technical Summary Page B 2 PPC 7368 USER S MANUAL BLOCK DIAGRAM...