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Hardware Configuration
PEB-2131VG2A User’s Manual
2-4
JP7 : LVDS Backlight control Enable or Disable
JP7
Function
1-2 short
Disable
Ì
2-3 short
Enable
JP10 : Super I/O GPIO Interface Connector
PIN No.
Signal Description
PIN No.
Signal Description
1
GPIO23 (DRAWER Output)
2
GPIO54
3
GPIO24 (DRAWER Output)
4
GPIO55
5
GPIO22 (DRAWER Input)
6
GPIO56
7 GPIO53
8 GPIO57
9 GND
10 +5V
JP11 : PANEL BACKLIGHT Selection
Pin No.
Signal Description
1-3, 2-4
5V, Active High
Ì
1-3, 4-6
12V, Active High
3-5,2-4
5V, Active Low
3-5,4-6
12V, Active Low
JP12 : LVDS Panel VDD input voltage selection
JP12
Function
2-4
short VDD=3.3V
Ì
3-4
short
VDD=12V
4-6
short
VDD=5V
Note:
Wrong voltage selection may damage the LVDS panel. Please survey LVDS panel’s
VDD before setup this jumper setting.
JP13 : BACK LIGHT PWR Connector
PIN No.
Signal Description
1 ENABLE
2 GND
3 +12V
4 GND
VCC
Содержание PEB-2131VG2A
Страница 7: ...System Overview PEB 2131VG2A User s Manual 1 4 1 3 1 Mechanical Drawing TOP side ...
Страница 8: ...System Overview PEB 2131VG2A User s Manual 1 5 Bottom side Rear IO ...
Страница 11: ...Hardware Configuration PEB 2131VG2A User s Manual 2 2 Figure 2 1 PEB 2131VG2A Jumper and Connector Locations ...