DV-59AVi
157
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No.
Name
I/O
Function
1
OVDD
−
VDD (3.3 V) for I/O
2
CLKI
I
27-MHz system clock input
3
TEST7
I
Input terminal dedicated for testing. To be connected to ground.
4
PLL_EN
I
PLL enable input terminal. The signal level is set to high once the power-supply voltage and the CLKI
stabilize.
5
PI0
I
ITU-R BT.656/601 input terminal (LSB)
6
PI1
I
ITU-R BT.656/601 input terminal
7
PI2
I
ITU-R BT.656/601 input terminal
8
PI3
I
ITU-R BT.656/601 input terminal
9
PI4
I
ITU-R BT.656/601 input terminal
10
PI5
I
ITU-R BT.656/601 input terminal
11
PI6
I
ITU-R BT.656/601 input terminal
12
PI7
I
ITU-R BT.656/601 input terminal
13
PI8
I
ITU-R BT.656/601 input terminal
14
PI9
I
ITU-R BT.656/601 input terminal (MSB)
15
NHSI
I
Horizontal sync input terminal
16
NVSI
I
Vertical sync input terminal
17
OVSS
−
Digital GND
18
THMD
I
Through-mode setting terminal. Normally to be connected to ground.
19
CVSS
−
Digital GND
20
NVSO
O
Vertical sync output terminal (Interlace or Progressive)
21
NHSO
O
Horizontal sync output terminal (Interlace or Progressive)
22
PO9
I/O
ITU-R BT.656/601 output terminal, or clamp-signal output and ITU-R BT.601 input terminal (MSB)
23
PO8
I/O
ITU-R BT.656/601 output terminal, or active-signal output and ITU-R BT.601 input terminal
24
PO7
I/O
ITU-R BT.656/601 output terminal, or blanking-signal output and ITU-R BT.601 input terminal
25
PO6
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
26
OVDD
−
VDD (3.3 V) for I/O
27
OVSS
−
Digital GND
28
PO5
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
29
PO4
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
30
PO3
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
31
PO2
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
32
PO1
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal
33
PO0
I/O
ITU-R BT.656/601 output terminal and ITU-R BT.601 input terminal (LSB)
34
TEST0
I
Input terminal dedicated for testing. To be connected to ground.
35
OVSS
−
Digital GND
36
OVDD
−
VDD (3.3 V) for I/O
37
CVDD
−
VDD (2.5 V) for the core
38
TEST1
I
Input terminal dedicated for testing. To be connected to ground.
39
TEST2
I
Input terminal dedicated for testing. To be connected to ground.
40
CLKO
O
27-MHz clock output
41
YO9
O
ANSI/SMPTE 293 M output terminal (Y, MSB)
42
YO8
O
ANSI/SMPTE 293 M output terminal (Y)
43
YO7
O
ANSI/SMPTE 293 M output terminal (Y)
44
YO6
O
ANSI/SMPTE 293 M output terminal (Y)
45
YO5
O
ANSI/SMPTE 293 M output terminal (Y)
46
OVDD
−
VDD (3.3 V) for I/O
47
OVSS
−
Digital GND
48
YO4
O
ANSI/SMPTE 293 M output terminal (Y)
Pin Function
Содержание DV-59AVi
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Страница 169: ...DV 59AVi 169 5 6 7 8 5 6 7 8 C D F A B E ...