DJM-800
154
1
2
3
4
1
2
3
4
C
D
F
A
B
E
No.
Mark
Pin Name
I/O
Pin Function
97
EXTAL
EXTAL
I
Crystal connection/external clock input
98
VCC
VCC
I
Power supply
99
VCC
VCC
I
Power supply
100
NC1
NC1
-
Non connection (open)
101
NC2
NC2
-
Non connection (open)
102
VSS
VSS
I
GND
103
STBYn
I
PULL UP
104
P63
VR_A01
O
A/D input select
105
P64
VR_A02
O
A/D input select
106
P65
VR_A03
O
A/D input select
107
CS0n
CS0
O
Expansion I/O: DP_RAM (FPGA)
108
CS1n
CS1
O
Expansion I/O: LED display DATA3
109
CS2n
CS2
O
Expansion I/O: LED display DATA1
110
CS3n
CS3
O
Expansion I/O: LED display DATA2
111
AVCC
AVCC
I
Power supply for A/D
112
VREF
VREF
I
Reference voltage input for A/D
113
AN0
VR0
I
VRin0 (MIC HIGH, LOW/H.P.MIXING, Volume) input
114
AN1
VR1
I
VRin1 (CH1: HIGH, MID, LOW, EFFECT) input
115
AN2
VR2
I
VRin2 (CH2: HIGH, MID, LOW, EFFECT) input
116
AN3
VR3
I
VRin3 (CH3: HIGH, MID, LOW, EFFECT) input
117
AN4
VR4
I
VRin4 (CH4: HIGH, MID, LOW, EFFECT) input
118
AN5
VR5
I
VRin5 (MASTER: LEVEL, BALANCE, /Booth LEVEL/effect DEPTH) input
119
AN6
VR6
I
VRin6 (TRIM 1-4) input
120
AN7
CH1_FADER
I
CH1 fader input
121
AN8
CH2_FADER
I
CH2 fader input
122
AN9
CH3_FADER
I
CH3 fader input
123
AN10
CH4_FADER
I
CH4 fader input
124
AN11
CRS_FADER
I
Cross fader input
125
AN12
TAP
I
TAP input
126
AN13
BEAT_EFON
I
Beat Effect SW
127
AN14
4896_SEL
I
48K/96K switching input
128
AN15
RET_IN
I
For confirming connection of the return cable
129
AVSS
AVSS
I
GND for A/D
130
PG4
EMU_01
I
For H8JTAG emulator
131
PG5
EMU_05
I
For H8JTAG emulator
132
PG6
EMU_06
I
For H8JTAG emulator
133
TXD2
SIO2_TXD
O
For SIO2gloup (DAC1-4) DAC_data
134
RXD2
SIO2_RXD
I
For SIO2gloup (DAC1-4) DAC_data
135
SCK2
SIO2_SCK
O
For SIO2gloup (DAC1-4) DAC_data
136
P53
EMU_02
I
For H8JTAG emulator
137
SCK1
SIO1_CLK
O
For SIO1gloup USB, FPGA, EEPROM, DIT
138
SCK0
FL_CLK
O
For FL display
139
RXD1
SIO1_RXD
I
For rewriting RXD & SIO1gloup FPGA, DIT
140
P32
P32
O
Vacant
141
TXD1
SIO1_TXD
O
For rewriting TXD & SIO1gloup FPGA, DIT
142
TXD0
FL_TXD
O
For FL display
143
MD0
MD0
I
Mode pin 0 NOR: Mode 4 At rewriting: Mode 3
144
MD1
MD1
I
Mode pin 1 NOR: Mode 4 At rewriting: Mode 3
Содержание DJM-800
Страница 35: ...DJM 800 35 5 6 7 8 5 6 7 8 C D F A B E 1 3 CN6 I CN1503 B ...
Страница 38: ...DJM 800 38 1 2 3 4 1 2 3 4 C D F A B E 3 14 PANEL 2 ASSY CN1710 C CN1711 C PANEL2 ASSY DWX2554 F F ...
Страница 39: ...DJM 800 39 5 6 7 8 5 6 7 8 C D F A B E Holder MASTER VOL LEVEL ZERO DETECTOR F ...
Страница 47: ...DJM 800 47 5 6 7 8 5 6 7 8 C D F A B E 3 3 I 3 3 I 3 3 I 1 3 I 1 3 2 3 I ...
Страница 49: ...DJM 800 49 5 6 7 8 5 6 7 8 C D F A B E HPD SDD BOD MA1D MA2D RECD 1 2 5 3 4 1 3 I 1 3 I 3 3 I 3 3 I 1 3 2 3 I ...
Страница 53: ...DJM 800 53 5 6 7 8 5 6 7 8 C D F A B E 1 3 I 1 3 I 1 3 I 1 3 I 2 3 I 1 3 I 1 3 2 3 I ...
Страница 63: ...DJM 800 63 5 6 7 8 5 6 7 8 C D F A B E D3 D4 D3 D4 D4 D4 D3 D3 CN1401 L ...
Страница 64: ...DJM 800 64 1 2 3 4 1 2 3 4 C D F A B E 3 24 DIGIB ASSY BUFFER D D D MA2D D 2 4 3 DIGIB ASSY DWX2546 M M ...
Страница 71: ...DJM 800 71 5 6 7 8 5 6 7 8 C D F A B E Q CN 8 I 2 3 CN 2502 O CN903 J ...