AVG-VDP1/UC
55
5
7
8
5
6
7
8
C
D
F
A
B
E
Pin No.
Pin Name
I/O
Format
Function and Operation
91
VSS6
GND
92
TEST2
Test mode
93
CKOEB
l
CK output enable input
94
CK
O
CPU clock output
95
CS5B
O
C
DRAM low address strobe output
96
CS3B
O
O
DRAM column address strobe output
97
CS1B
C
DRAM column address upper byte strobe output
98
RTCVSS1
l
Power supply (3.3V)
99
SRAMB
l
Backup memory select input
100
STANBYB
Stand by signal input
101
RTCVSS0
GND
102
XRTCIN
l
C
C
C
Sub crystal oscillator input (RTC)
103
XRTCOUT
O
Sub crystal oscillator output (RTC)
104
RTCVCC
Power supply (3.3V)
105
PCKSEL0
l
Processor clock select input
106
PCKSEL1
l
Processor clock select input
107
CCKSEL
l
l/O
CRCK signal select input
108
CCKDIR
Carrier clock direct input / inverter amp output
Power supply (3.3V)
109
CCKVCC
110
CRCK
l
Carrier clock input
111
CCKGND
GND
112-118
PC0-6
l/O
Parallel input / output
119
NMI
Connect to VCC
120
RESETB
l
System reset input
121
MSTRSTB
l
Test reset input
122
TEST0
l
Test mode input
123
TEST1
l
Test mode input
124
REFSEL
l
GPS reference clock select input
125
REFCK
l
Reference clock input
126
VCC7
Power supply (3.3V)
127
VSS7
GND
128
XAUXIN
l
C
C
Sub crystal oscillator output input (AUX)
129
XAUXOUT
O
Sub crystal oscillator output (AUX)
130-133
PIN0-3
l
Parallel input
134-137
PIO4-7
l/O
Parallel input / output
138
TXD3
l/O
SIO3 Transmission data input / output
139
RXD3
l/O
SIO3 Reception data input / output
140
BOWWOWB
O
Watch dog timer output
141
IFDIR
l/O
IF direct input / IF inverter amp output
142
IFVCC
l
l
Power supply (3.3V)
143
IF
IF input
IF amp GND input
Format
C
Meaning
C MOS
144
* PD3390A
37
109
144
36
1
IFGND
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