AVG-VDP1/UC
10
1
2
4
1
2
3
4
C
D
F
A
B
E
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM
3.1 BLOCK DIAGRAM
TXGPS
VCC33-2
RXGPS
11
12
14
15
16
CN551
MOTHER UNIT
A
VCC25
SRVDD
TVON
RXSYS
TXSYS
17
18
20
25
26
27
ACCPW
SELFRX
SELFTX
MODE1
RST
29
30
31
32
33
DAVOL
VSENS
LEVINL
GPSPW
34
35
37
41
NPSEL
PBSENS
RED
43
44
47
SELFOUT
SELFIN
GUIDEON
MONION
REVPUL
6
7
8
9
10
DSENS
BEEP
ASENS
REVADIN
BSENS
1
2
3
4
5
GREEN
BLUE
48
49
CSYNC
50
YS
45
4
7
3
2
10
6
IC152
TC7SET08FUS1
2
1
4
ROUT
BOUT
GOUT
CVOUT
NPSEL
RIN
BIN
GIN
NPIN
SCIN
SYNCIN
IC101
CXA1645M
RED
BLUE
GREEN
IC102
TC7WHU04FU
2
6
X101
3.58MHz
3
5
IC103
TC4S66F
1
2
2
X102
4.43MHz
IC105
TC4S66F
1
2
2
IC10
BACK UP
Q904
Q905
Q151
CN552
MODE1
SELFIN
8
9
10
SELFTX
SELFRX
RST
SELFOUT
4
5
6
7
VCC33-1
S551
Q101
MONMON
TV
4
4
4
4
75 D
RESET
3.58MH
SELECT
LPF FOR BEEP SOUND/
VOLUME CONTROL
11
12
14
15
16
CN1001
17
18
20
25
26
27
29
30
31
32
33
34
35
37
41
43
44
47
6
7
8
9
10
1
2
3
4
5
48
49
50
45
TVON
RXSYS
TXSYS
ACCPW
SELFRX
SELFTX
MODE1
RST
DAVOL
VSENS
LVLINL
GPSPW
NPSEL
PBSENS
RED
GREEN
BLUE
CSYNC
YS
TXGPS
RXGPS
SELFOUT
SELFIN
GUIDEON
MONON
REVPUL
DSENS
BEEP
ASENS
REVAD
BSENS
VCC33
VCC25
SRVDD
CN1002
Not used
MODE1
RESET
TCK
6
7
9
VCC
TDO
TDI
TRST
TMS
1
2
3
4
5
RGBARI
RXSYS
TXSYS
ACCPW
DPDT
KYDT
CS5
RESET
DAVOL
BATTIN
LVLINL
GPSPW
NTPALSEL
PBSENS
OUT(R)
OUT(G)
OUT(B)
CSYNC
CDE
TXGPS
RXGPS
SELFOUT
SELFIN
GUIDEON
MONON
REVPUL
DSENS
BEEP
ASENS
REVINAD
BSENS
BA0,BA1
MRAS,MCAS,
MCS,MWE
MODE1
CLK1
DATA BUS
A01-A23
ADDRESS BUS
D00-D15
CLK0
WAIT
WAIT
91
TRST
TMS
TCK
TDO
TDI
45
46
65
47
48
49
53
54
55
102
66
68
78
80
90
88
86
145
40
39
41
42
44
33
18
31
76
30
146
148
157
161
Q1103
IC1104
TC7SH32FUS1
2
1
4
IC1201
6
2
X1201
33MHz
5
3
TC7WHU04FU
IC1304
X1202
A01-A22
D00-D15
VCC33
IC1102
S-80830CNNB-B8P
RESET
MA01-MA11
MD00-MD15,
A01-A23
D00-D15
A01-A19
D00-D15
A01-A23
D00-D15
DATA BUS
ADDRESS BUS
IC1305
K4S641632H-TC75
IC1302
IC1301
M5M5W816TP-70HI
IC1101
PE5489A
IC1202
HD64413ASFI
REPLAY DATA/
SETUP
MAINTENANCE
ROM FOR
PICTURE
ROM FOR
PICTURE
PAINT DATA
CACHE
WE0
WE1
CS1
CS0
RD
WE
LWR
UWR
OE1
OE2
OE1
OE2
CS4
CS3
CS4
CS3
SYSTEM
MICROCOMPUTER
GDC
27
24
24
27
17
40
39
PD8147A
96
97
107
104
103
95
94
106
166
165
163
162
169
LDQM,UDQM
MCLK
138
49
48
28
29
32
35
36
VDD33
OPERATINGCLOCK
PAINT CLOCK
WE
BC1
BC2
RD
WE
LWR
UWR
RD
CS4
CS3
CS1
CS0
LWR
UWR
X2
X1
57
X1101
58
8.00MHz
RD
RD
PD8148A
164
OE
41
GDC PCB
B
2
1
RESET
44
GDCRES
IRL
172
21
GDCPW
20
19
IRL
CE
6
11
33
SRVDD
VCC
VCC
JTAG
15,39
38
16-19
79,80
77,78,
95,96
GDC33
Q1002
Q1001
VCC33
CHIP SELLECT
CANCELLATION
SCHEMATIC
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