Philips MC-D370/22, Руководство по обслуживанию

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AM / FM PLL FREQUENCY SYNTHESIZER
LC72131M
7-3 7-3
Pin Functions
Pin No.
Symbol (MFP pin Nos. are Type Functions Circuit configuration
in parentheses.)
XIN
XOUT
FMIN
AMIN
CE
CL
DI
DO
V
DD
1 (1)
22 (20)
16 (14)
15 (13)
3 (2)
5 (4)
4 (3)
6 (5)
17 (15)
Xtal OSC
Local oscillator
signal input
Local oscillator
signal input
Chip enable
Clock
Data input
Data output
Power supply
• Crystal resonator connection
(4.5/7.2 MHz)
• FMIN is selected when the serial data input DVS bit is
set to 1.
• The input frequency range is from 10 to 160 MHz.
• The input signal passes through the internal divide-by-
two prescaler and is input to the swallow counter.
• The divisor can be in the range 272 to 65535. However,
since the signal has passed through the divide-by-two
prescaler, the actual divisor is twice the set value.
• AMIN is selected when the serial data input DVS bit is
set to 0.
• When the serial data input SNS bit is set to 1:
—The input frequency range is 2 to 40 MHz.
—The signal is directly input to the swallow counter.
—The divisor can be in the range 272 to 65535, and
the divisor used will be the value set.
• When the serial data input SNS bit is set to 0:
—The input frequency range is 0.5 to 10 MHz.
—The signal is directly input to a 12-bit programmable
divider.
—The divisor can be in the range 4 to 4095, and the
divisor used will be the value set.
Set this pin high when inputting (DI) or outputting (DO)
serial data.
• Used as the synchronization clock when inputting (DI) or
outputting (DO) serial data.
• Inputs serial data transferred from the controller to the
LC72131.
• Outputs serial data transferred from the LC72131 to the
controller.
The content of the output data is determined by the
serial data DOC0 to DOC2.
• The LC72131 power supply pin (V
DD
= 4.5 to 5.5 V)
• The power on reset circuit operates when power is first
applied.
Continued on next page.
Continued from preceding page.
Pin No.
Symbol (MFP pin Nos. are Type Functions Circuit configuration
in parentheses.)
V
SS
BO1
BO2
BO3
BO4
IO1
IO2
PD
AIN
AOUT
IFIN
21 (19)
7 (6)
8 (7)
9 (8)
10 (9)
11 (10)
13 (12)
18 (16)
19 (17)
20 (18)
12 (11)
Ground
Output port
I/O port
Charge pump
output
LPF amplifier
transistor
IF counter
• The LC72131 ground —
• Dedicated output pins
• The output states are determined by BO1 to BO4 bits in
the serial data.
Data: 0 = open, 1 = low
• A time base signal (8 Hz) can be output from the BO1
pin. (When the serial data TBC bit is set to 1.)
• Care is required when using the BO1 pin, since it has a
higher on impedance that the other output ports (pins
BO2 to BO4).
• All output ports are set to the open state following a
power on reset.
• I/O dual-use pins
• The direction (input or output) is determined by bits IOC1
and IOC2 in the serial data.
Data: 0 = input port, 1 = output port
• When specified for use as input ports:
The state of the input pin is transmitted to the controller
over the DO pin.
Input state: low = 0 data value
high = 1 data value
• When specified for use as output ports:
The output states are determined by the IO1 and IO2
bits in the serial data.
Data: 0 = open, 1 = low
• These pins function as input pins following a power on
reset.
• PLL charge pump output
When the frequency generated by dividing the local
oscillator frequency by N is higher than the reference
frequency, a high level is output from the PD pin.
Similarly, when that frequency is lower, a low level is
output. The PD pin goes to the high impedance state
when the frequencies match.
• The n-channel MOS transistor used for the PLL active
low-pass filter.
• Accepts an input in the frequency range 0.4 to 12 MHz.
• The input signal is directly transmitted to the IF counter.
• The result is output starting the MSB of the IF counter
using the DO pin.
• Four measurement periods are supported: 4, 8, 32, and
64 ms.
AM / FM PLL FREQUENCY SYNTHESIZER
LC72131M