Philips LC4.2HE, Руководство по обслуживанию, Страница: 65 / 78

Circuit Descriptions, List of Abbreviations, and IC Data Sheets EN 6 5 LC4.2HE AA 9.
9.7 Video: Scaler Part (diagram A7 and A13)
The Genesis gm1501 Scaler is a dual channel graphics and
video processing IC for LCD monitors and televisions
incorporating Picture in Picture, up to SXGA output resolutions.
The Scaler controls the display processing in an LCD TV, e.g.
like the deflection circuit in a CRT-based TV. It controls all the
view modes (e.g. like "zooming" and "shifting"). Features like
PC (VGA) or HD inputs, are also handled by this part.
Figure 9-4 Block diagram Scaler Part
9.7.1 Features
The Scaler provides several key IC functions:
•
Scaling.
• Auto-configuration/ Auto-Detection.
• Various Input Ports:
–
Analog RGB.
– DVI Compliant.
– Video Graphics.
• Integrated LVDS Transmitter.
• On-chip Micro-controller
9.7.2 Inputs
Analog RGB
The RGB input is fed to pins B2, C2 and D2. This input consists
of either the Hercules RGB output or the RGB/YpbPr input of
the VGA connector. The Scaler can switch between the two
signals via the PC_HD_SEL signal and selection IC SM5301.
PC (VGA) input
The VGA input is processed by the VGA block of the Scaler.
The Scaler supports pixel frequencies up to 165MHz.
YpbPr format is also supported via the VGA interface and
covers a resolution of 480p/560p/720p/1080i.
DVI-D input
The DVI-D input is processed by the Scaler and supports DVI
sources with a pixel clock frequency up to 81MHz.
9.7.3 Output
The Display Output Port provides data and control signals that
permit the Scaler to connect to a variety of display devices
using a TTL or LVDS interface. The output interface is
configurable for single or dual wide TTL/LVDS in 18, 24 or 30-
bit RGB pixels format. All display data and timing signals are
synchronous with the DCLK output clock. The integrated LVDS
transmitter is programmable to allow the data and control
signals to be mapped into any sequence depending on the
specified receiver format.
ADDRESS
DDR
FRAME
STORE
INTERFACE
EXT.
FLASH
ROM
INTER-
FACE
DISPLAY
TIMING
GEN
DVI
INPUT
PORT
ANALOG
INPUT
PORT
1
5
11
15
PC-IN
9
7
6
2
1
17
18
15
14
3,11,19,22
10
24
23
DDC
NVM
7693
6
5
8
DDC_5V
RXC+IN
RXC-IN
RX1+IN
RX0+IN
DVI-IN
16
HOT_PLUG
+5VSWI
3682
6692
6691
5692
3691
DDC_5V
3710
RX1-IN
SDA_DVI
SCL_DVI
DVI
NVM
7694
8
6
RX2+IN
RX2-IN
RX0-IN
u-Processor
HERCULES
IC
7011
FLASH
ROM
1,2
3,4,5
7
8
10,11
12
20
17
1403
T
O LCD P
ANEL (L
VDS)
6
9
14
15
13,16
18
19
TXB0-
TXBC+
TXB3+
TXB1-
TXB1+
TXBC-
TXB2-
TXB2+
TXB0+
TXB3-
SDRAM
DATA
DATA
GRAPHIC
ZOOM
VIDEO
ZOOM
OSD CONTR
OLLER
OUT BLENDER
BRIGHTNESS/CONTRAST/HUE/SA
T
INTERNAL
ROM &
RAM
UART
INTERFACE
MICRO-
CONTROLLER
80186
HOT_PLUG
87
86
85
PAN_VCC
7530
A10
7501
7401
GM1501
SXGA DISPLAY
CONTROLLER
GPIO_G07_B7
2488
1401
TCLK
XTAL
2487
+3V3_PLL
T
O EPLD P
ANEL (PIXEL +)
6693 5686
DDC_5V
ADDRESS
VS
HS
PC
RED_PR
GRN_Y
BLU_PB
7606
9, 17, 19
14
12
1
15
11
2
PC_HD_SEL
A 7
PC_HD_DET-
11 10
6604
6605
7604-5
PC_HD_DET
A7
7605
H_CS_SDTV
V_SDTV
VS
HS
SD_HD_SEL
7604
1 2 3 4
13 12
5 6 9 8
13
12
1
3
14
15
9,11
HD_FILTER
7604-6
7607
R_PR+
G_Y+
B_PB+
9
17
14
11
R_SDTV
G_SDTV
B_SDTV
RED_PR
GRN_Y
BLU_PB
H_CS
V
27
2
7
25
1
5
21
A2
A2
A2
A7
A2
A2
A7
SOG
SD_HD_SEL A7
22
PC_HD_SEL
107
107
R_SDTV
G_SDTV
B_SDTV
H_CS_SDTV
V_SDTV
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