Philips EM7U LCOS, Руководство по обслуживанию

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TMDS TRANSMITTER (Figure 56)
The three 8-bit video data lines, OSD_RED, OSD_GREEN, and OSD_BLUE are fed to the
TMDS Transmitter, 7295. IC 7295 converts the Parallel data into DVI formatted serial data
lines to drive the Light Engine. Data and Sync are output on TX0. TX1 and TX2 are encod-
ed with video data. TXC is the clock line.
MSB CLOCK AND SYNC LINES (Figure 57)
If the input signal is a 1080I Analog signal, the Sync will most likely be Tri-Level sync. This
Sync is fed to a Sync Slicer circuit and then to the PLD. Horizontal, Vertical, Clock, and an
Enable line are fed from the LVDS Receiver to the Scaler. Horizontal Sync, Vertical Sync,
and Clock from the A/D converter and DVI receiver are also fed to the Scaler. The A/D
converter or the DVI Receiver is selected by the Scaler IC. The output of the one selected is
turned On. The output of the other one is turned Off. Sync is then fed to the PLD and then
to the TMDS Transmitter. Sync is transmitted to the Light Engine via data lines.
LIGHT ENGINE BLOCK (Figure 58)
TMDS data from the MSB is fed to the TMDS Receiver on the Light Engine. Red, Green,
and Blue data is fed to IC 7301 for Contrast, Brightness, and Gamma correction. The Signal
is then output to a Homogeneity correction circuit. This circuit corrects for uneven brightness
and contrast spots in the picture. This output is then fed to a latch circuit and then to the
Display Control circuit. This circuit addresses the rows and columns of the Reflective LCD
Panel.
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