Pentek Model 78741 Installation Manual
Page 7
Rev.: 2.5
1.5
Principle of Operation
Model 78741 consists of one Pentek Model 71741 XMC module mounted on a Pentek
Model 7807 XMC PCI Express carrier, assembled and tested as a single board. It is
ready to plug into computer boards with PCI Express (PCIe
®
) bus slots. The 71741
XMC has a Pentek−supplied FPGA IP core which includes a multiband Digital
Downconverter (DDC).
The 71741 XMC includes a single−channel 3.6−GHz A/D converter or a two−channel
1.8−GHz A/D converter. Depending on the ADC operating mode (DES or non−DES),
the ADC processes either a single analog input using two A/D channels, or two analog
inputs using separate A/D channels, and sends the digital output from both channels
to the 71741 FPGA as separate data streams. The 71741 FPGA interleaves the two data
streams for processing by the ADC acquisition module and the digital downconverter
core.
The Model 71741 XMC includes GateXpress, a sophisticated FPGA−PCIe configuration
manager for loading and reloading the FPGA. Refer to the
Model 71741 Operating Man−
ual
, Pentek document 800.71741, for description of GateXpress.
The 71741 includes 4 GBytes of DDR3 SDRAM. This memory is controlled by the FPGA
and is organized as four banks. Separate banks (separate address and data per bank)
allow simultaneous access to all banks. This memory can be used as:
•
data capture
•
as buffer memory when transferring data between board resources or to off−board
resources
•
a memory resource for custom FPGA applications.
The 7807 Carrier provides one x8 full−duplex PCIe port, allowing high−speed 71741
data transfer to and from the baseboard PCIe bus using the XMC P15 connector. An
optional XMC P16 connector provides two x4 gigabit serial I/O ports to support Xilinx
Aurora, Serial RapidIO, or PCIe interfaces (for Option 105). Two Samtec FireFly™
serial connectors (SER RX, SER TX) are included on the 7807 Carrier, providing access
to both P16 x4 gigabit serial paths from the XMC module. An optional PMC P14 con−
nector provides a data path to a GPIO connector on the carrier PCB (for Option 104).
